메뉴 건너뛰기




Volumn , Issue , 2003, Pages 883-890

Large-Scale Circuit Placement: Gap and Promise

Author keywords

Large Scale Optimization; Optimality; Placement; Scalability

Indexed keywords

COMPUTER AIDED ENGINEERING; COMPUTER SOFTWARE; HIERARCHICAL SYSTEMS; LOGIC DESIGN; OPTIMIZATION; TECHNOLOGY;

EID: 0346148419     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2003.159779     Document Type: Conference Paper
Times cited : (14)

References (69)
  • 1
    • 84889137190 scopus 로고    scopus 로고
    • http://cadlab.cs.ucla.edu/̃pubbench.
  • 10
    • 0346237588 scopus 로고    scopus 로고
    • Cadence Design Systems, Inc. Envisia ultra placer reference. compiled on 10/25/
    • Cadence Design Systems, Inc. Envisia ultra placer reference. QPlace version 5.1.55, compiled on 10/25/1999.
    • (1999) QPlace Version 5.1.55
  • 11
    • 0034313430 scopus 로고    scopus 로고
    • Optimal partitioners and end-case placers for standard-cell layout
    • A. Caldwell, A.B.Kahng, and I. Markov. Optimal partitioners and end-case placers for standard-cell layout. IEEE Trans. on CAD, 19(11):1304-1314, 2000.
    • (2000) IEEE Trans. on CAD , vol.19 , Issue.11 , pp. 1304-1314
    • Caldwell, A.1    Kahng, A.B.2    Markov, I.3
  • 20
    • 0021455306 scopus 로고
    • Module placement based on resistive network optimization
    • Jul
    • C. Cheng and E. Kuh. Module placement based on resistive network optimization. IEEE Transactions on Computer-Aided Design, CAD-3 (3), Jul 1984.
    • (1984) IEEE Transactions on Computer-aided Design , vol.CAD-3 , Issue.3
    • Cheng, C.1    Kuh, E.2
  • 21
    • 0028699832 scopus 로고
    • RISA: Accurate and efficient placement routability modeling
    • Nov.
    • C.-L. E. Cheng. RISA: accurate and efficient placement routability modeling. In Proc. Int. Conf. on Computer Aided Design, pages 690-695, Nov. 1994.
    • (1994) Proc. Int. Conf. on Computer Aided Design , pp. 690-695
    • Cheng, C.-L.E.1
  • 22
    • 0000090413 scopus 로고    scopus 로고
    • An interconnect-centric design flow for nanometer technologies
    • April
    • J. Cong. An interconnect-centric design flow for nanometer technologies. Proceedings of the IEEE, 89(4):505-527, April 2001.
    • (2001) Proceedings of the IEEE , vol.89 , Issue.4 , pp. 505-527
    • Cong, J.1
  • 23
    • 0003132154 scopus 로고    scopus 로고
    • Edge separability based circuit clustering with application to circuit partitioning
    • Yokohama Japan
    • J. Cong and S. K. Lim. Edge separability based circuit clustering with application to circuit partitioning. In Asia South Pacific Design Automation Conference, Yokohama Japan, pages 429-434, 2000.
    • (2000) Asia South Pacific Design Automation Conference , pp. 429-434
    • Cong, J.1    Lim, S.K.2
  • 24
    • 0038716771 scopus 로고    scopus 로고
    • Optimality, scalability and stability study of partitioning and placement algorithms
    • J. Cong, M. Romesis, and M. Xie. Optimality, scalability and stability study of partitioning and placement algorithms. In Proc. International Symposium on Physical Design, pages 88-94, 2003.
    • (2003) Proc. International Symposium on Physical Design , pp. 88-94
    • Cong, J.1    Romesis, M.2    Xie, M.3
  • 31
    • 0019478261 scopus 로고
    • An efficient algorithm for the two-dimensional placement problem in electrical circuit layout
    • January
    • S. Goto. An efficient algorithm for the two-dimensional placement problem in electrical circuit layout. IEEE Trans. on Circuits and Systems, 28(1):12-18, January 1981.
    • (1981) IEEE Trans. on Circuits and Systems , vol.28 , Issue.1 , pp. 12-18
    • Goto, S.1
  • 34
    • 0027316516 scopus 로고
    • Prime: A timing-driven placement tool using a piecewise linear resistive network approach
    • T. Hamada, C. K. Cheng, and P. M. Chau. Prime: a timing-driven placement tool using a piecewise linear resistive network approach. In Proc. ACM/IEEE Design Automation Conference, pages 531-536, 1993.
    • (1993) Proc. ACM/IEEE Design Automation Conference , pp. 531-536
    • Hamada, T.1    Cheng, C.K.2    Chau, P.M.3
  • 37
    • 0038040222 scopus 로고    scopus 로고
    • Fine granularity clustering for large-scale placement problems
    • Jun.
    • B. Hu and M. Marek-Sadowska. Fine granularity clustering for large-scale placement problems. In Proc. Design Automation Conference, pages 67-74, Jun. 2003.
    • (2003) Proc. Design Automation Conference , pp. 67-74
    • Hu, B.1    Marek-Sadowska, M.2
  • 40
    • 0013023902 scopus 로고    scopus 로고
    • chapter 3 of Multilevel Optimization and VLSICAD, Kluwer Academic Publishers, Boston
    • G. Karypis. Multilevel Hypergraph Partitioning, chapter 3 of Multilevel Optimization and VLSICAD, Kluwer Academic Publishers, Boston, 2002.
    • (2002) Multilevel Hypergraph Partitioning
    • Karypis, G.1
  • 44
    • 0026175521 scopus 로고
    • A fast physical constraint generator for timing driven layout
    • W. K. Luk. A fast physical constraint generator for timing driven layout. In Proc. ACM/IEEE Design Automation Conference, pages 626-631, 1991.
    • (1991) Proc. ACM/IEEE Design Automation Conference , pp. 626-631
    • Luk, W.K.1
  • 47
    • 0025545056 scopus 로고
    • Congestion-driven placement using a new multi-partitioning heuristic
    • S. Mayrhofer and U. Lauther. Congestion-driven placement using a new multi-partitioning heuristic. In Proc. Int. Conf. on Computer Aided Design, pages 332-335, 1990.
    • (1990) Proc. Int. Conf. on Computer Aided Design , pp. 332-335
    • Mayrhofer, S.1    Lauther, U.2
  • 50
    • 0032640531 scopus 로고    scopus 로고
    • Trading quality for compile time: Ultra-fast placement for FPGAs
    • Y. Sankar and J. Rose. Trading quality for compile time: Ultra-fast placement for FPGAs. In FPGA '99, ACM Symp. on FPGAs, pages 157-166, 1999.
    • (1999) FPGA '99, ACM Symp. on FPGAs , pp. 157-166
    • Sankar, Y.1    Rose, J.2
  • 60
    • 0026175786 scopus 로고
    • An analytic net weighting approach for performance optimization in circuit placement
    • R. S. Tsay and J. Koehl. An analytic net weighting approach for performance optimization in circuit placement. In Proc. ACM/IEEE Design Automation Conference, pages 620-625, 1991.
    • (1991) Proc. ACM/IEEE Design Automation Conference , pp. 620-625
    • Tsay, R.S.1    Koehl, J.2
  • 67
    • 0034841571 scopus 로고    scopus 로고
    • Improved cut sequences for partitioning-based placement
    • M. C. Yildiz and P. H. Madden. Improved cut sequences for partitioning-based placement. In Proc. Design Automation Conference, pages 776-779, 2001.
    • (2001) Proc. Design Automation Conference , pp. 776-779
    • Yildiz, M.C.1    Madden, P.H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.