-
2
-
-
0028564214
-
A general framework for vertex ordering with applications to netlist clustering
-
C. J. Alpert and A. B. Kahng. A general framework for vertex ordering with applications to netlist clustering. In Proc. Int. Conf. on Computer-Aided Design, pages 652-657, 1994.
-
(1994)
Proc. Int. Conf. on Computer-Aided Design
, pp. 652-657
-
-
Alpert, C.J.1
Kahng, A.B.2
-
4
-
-
0027307171
-
On area/depth trade-off in LUT-based FPGA technology mapping
-
J. Cong and Y. Ding. On area/depth trade-off in LUT-based FPGA technology mapping. In Proc. Design Automation Conf., pages 213-218, 1993.
-
(1993)
Proc. Design Automation Conf.
, pp. 213-218
-
-
Cong, J.1
Ding, Y.2
-
5
-
-
0032642353
-
Simultaneous circuit partitioning/clustering with retiming for performance optimization
-
J. Cong, H. Li, and C. Wu. Simultaneous circuit partitioning/clustering with retiming for performance optimization. In Proc. Design Automation Conf., 1999.
-
Proc. Design Automation Conf., 1999
-
-
Cong, J.1
Li, H.2
Wu, C.3
-
6
-
-
0031364691
-
Large scale circuit partitioning with loose/stable net removal and signal flow based clustering
-
J. Cong, H. P. Li, S. K. Lim, T. Shibuya, and D. Xu. Large scale circuit partitioning with loose/stable net removal and signal flow based clustering. In Proc. Int. Conf. on Computer-Aided Design, pages 441-446, 1997.
-
(1997)
Proc. Int. Conf. on Computer-Aided Design
, pp. 441-446
-
-
Cong, J.1
Li, H.P.2
Lim, S.K.3
Shibuya, T.4
Xu, D.5
-
9
-
-
0027150132
-
A parellel bottom-up clustering algorithm with applications to circuit partitioning in VLSI design
-
J. Cong and M. Smith. A parellel bottom-up clustering algorithm with applications to circuit partitioning in VLSI design. In Proc. Design Automation Conf., pages 755-760, 1993.
-
(1993)
Proc. Design Automation Conf.
, pp. 755-760
-
-
Cong, J.1
Smith, M.2
-
10
-
-
0024090156
-
A new approach to the maximum flow problem
-
A. V. Goldberg and R. E. Tarjan. A new approach to the maximum flow problem. Journal of ACM, pages 921-940, 1988.
-
(1988)
Journal of ACM
, pp. 921-940
-
-
Goldberg, A.V.1
Tarjan, R.E.2
-
11
-
-
84969784748
-
When clusters meet partitions: New density-based methods for circuit decomposition
-
D. J. Huang and A. B. Kahng. When clusters meet partitions: new density-based methods for circuit decomposition. In Proc. European Design and Test Conf., pages 60-64, 1995.
-
(1995)
Proc. European Design and Test Conf.
, pp. 60-64
-
-
Huang, D.J.1
Kahng, A.B.2
-
12
-
-
0030686036
-
Multilevel hypergraph partitioning: Application in VLSI domain
-
G. Karypis, R. Aggarwal, V. Kumar, and S. Shekhar. Multilevel hypergraph partitioning: Application in VLSI domain. In Proc. Design Automation Conf., pages 526-529, 1997.
-
(1997)
Proc. Design Automation Conf.
, pp. 526-529
-
-
Karypis, G.1
Aggarwal, R.2
Kumar, V.3
Shekhar, S.4
-
14
-
-
0002659735
-
Computing edge connectivity in multigraphs and capacitated graphs
-
H. Nagamochi and T. Ibaraki. Computing edge connectivity in multigraphs and capacitated graphs. SIAM Journal on Discrete Math., pages 54-66, 1992.
-
(1992)
SIAM Journal on Discrete Math.
, pp. 54-66
-
-
Nagamochi, H.1
Ibaraki, T.2
-
17
-
-
0027658937
-
A simple yet effective technique for partitioning
-
H. Shin and C. Kim. A simple yet effective technique for partitioning. IEEE Trans. on VLSI Systems, pages 380-386, 1993.
-
(1993)
IEEE Trans. on VLSI Systems
, pp. 380-386
-
-
Shin, H.1
Kim, C.2
-
18
-
-
0027864987
-
Efficient and effective placements for very large circuits
-
W. Sun and C. Sechen. Efficient and effective placements for very large circuits. In Proc. Int. Conf. on Computer-Aided Design, pages 170-177, 1993.
-
(1993)
Proc. Int. Conf. on Computer-Aided Design
, pp. 170-177
-
-
Sun, W.1
Sechen, C.2
|