Three-Dimensional Integration in Silicon Electronics

Proceedings IEEE Lester Eastman Conference on High Performance Devices

Volumn , Issue , 2002, Pages 24-33

  Tiwari, Sandip ^a   Kim, H S ^a   Kim, S ^a   Kumar, A ^a   Liu, C C ^a   Xue, L ^a  

^a Cornell University ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COSTS; CROSSTALK; ELECTRONIC EQUIPMENT; ENERGY DISSIPATION; PRODUCT DESIGN;

POWER DISSIPATION;

SILICON;

EID: 0242365564     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

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9. L. Xue and S. Tiwari, "Multi-Layers with Buried Structures (MLBS): An Approach to Three-Dimensional Integration," Tech. Dig. of IEEE International SOI Conference, 117 Oct. (2001)
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