Alternating phase shift masks for contact patterning

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5040 I, Issue , 2003, Pages 294-302

  Schenker, Richard ^a   Allen, Gary ^a   Tejnil, Edita ^a   Ogadhoh, Shem ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Alt PSM; Assist feature; Contact; Defect printability; Mask inspection; PSM

Indexed keywords

DEFECTS; MASKS; PHASE SHIFT; SEMICONDUCTOR DEVICE MANUFACTURE;

CONTACT PATTERNING; GATE CRITICAL DIMENSION; MASK ERROR ENHANCEMENT FACTORS; MASK INSPECTION; PHASE SHIFT MASKS;

PHOTOLITHOGRAPHY;

EID: 0141722441     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.485495     Document Type: Conference Paper

References (8)

1. M.E. Kling et al., "Practicing extension of 248-nm DUV optical lithography using trim-mask PSM," SPIE 3679 (1999), pp. 10-17.
2. L.W. Liebermann et al., "Alternating phase-shifted mask for logic gate levels, design, and mask manufacturing," SPIE 3679 (1999), pp. 27-37.
3. Intel patent pending.
4. Tatsuo Chijimatsu et al., "Implementation of Attenuated PSMs in DRAM production," SPIE 2726 (1996), pp. 461-472.
5. Allen Gabor et al., "Sub-resolution Assist Feature Implementation for High Performance Logic Gate-Level Lithography," SPIE 4691 (2002), pp. 418-425.
6. J. Fung Chen et al., "Practical method for full-chip optical proximity correction," SPIE 3051 (1997), pp. 790-803.
7. G. Patrick Watson et al., "Sub-resolution Assist Feature and Off-Axis Illumination Optimization for 200 and 240 nm Contact Windows using 248 nm Lithography," SPIE 3334 (1998), pp. 131-139.
8. R. Schenker et al., "Alt-PSM for 0.10um and 0.13um poly patterning," SPIE 4000 (2000), pp. 112-120.