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Volumn 4691 I, Issue , 2002, Pages 418-425

Sub-resolution assist feature implementation for high performance logic gate-level lithography

Author keywords

[No Author keywords available]

Indexed keywords

ABERRATIONS; LENSES; LOGIC GATES; MASKS; SCANNING ELECTRON MICROSCOPY; STATIC RANDOM ACCESS STORAGE;

EID: 18644385860     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.474591     Document Type: Conference Paper
Times cited : (20)

References (8)
  • 3
    • 0033713396 scopus 로고    scopus 로고
    • Lithographic comparison of assist feature design strategies
    • C. Progler, ed, SPIE
    • S. Mansfield, L. Liebmann, A. Molless, and Alfred K. Wong, "Lithographic Comparison of Assist Feature Design Strategies," in Proc. SPIE (C. Progler, ed.), vol 4000, SPIE, 20.
    • Proc. SPIE , vol.4000 , pp. 20
    • Mansfield, S.1    Liebmann, L.2    Molless Alfred, A.3    Wong, K.4
  • 7
    • 0020249292 scopus 로고
    • Improving resolution in photolithography with a phase-shifting mask
    • Dec.
    • M. Levinson, N. Viswanathan, and R. Simpson, "Improving resolution in photolithography with a phase-shifting mask," IEEE Transactions on Electron Devices, vol. 29, pp. 1812-1846, Dec. 1982.
    • (1982) IEEE Transactions on Electron Devices , vol.29 , pp. 1812-1846
    • Levinson, M.1    Viswanathan, N.2    Simpson, R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.