Performance enhancement and evaluation of deep dry etching on a production cluster platform

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 4979, Issue , 2003, Pages 34-42

  McNie, Mark ^a   Pickering, Christopher ^a   Rickard, Alexandra ^a   Young, Iain ^a   Hopkins, Janet ^b   Ashraf, Huma ^b   McAuley, Serrita ^b   Nicholls, Glenn ^b   Barnett, Richard ^b   Roozeboom, Fred ^c   Kemmeren, Anton ^c   Van Den Heuvel, Eric ^c   Verhoeven, Jan ^c   Gormley, Colin ^d   Schina, Paulo ^e   Di Luciano, Corrado ^e   Kiihamäki, Jyrki ^f  

^a QINETIQ   (United Kingdom)

^b Surface Technology Systems Plc   (United Kingdom)

^c PHILIPS RESEARCH LABORATORIES   (Netherlands)

^d Analog Devices Inc UK   (United Kingdom)

^e Olivetti Jet ^*  (Italy)

^f VTT TECHNICAL RESEARCH CENTRE OF FINLAND   (Finland)

Author keywords

Deep dry etching; DRIE; High aspect ratio; ICP; Manufacturing; MEMS; Micromachining; Microsystems; Silicon; SOI

Indexed keywords

ASPECT RATIO; INDUCTIVELY COUPLED PLASMA; MICROELECTROMECHANICAL DEVICES; MICROMACHINING; SILICON ON INSULATOR TECHNOLOGY;

ADVANCED SILICON ETCH; COST OF OWNERSHIP; DEEP DRY ETCHING; MICROSYSTEMS PRODUCTION EVALUATED CLUSTER TOOL;

DRY ETCHING;

EID: 0042732917     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.478242     Document Type: Conference Paper

References (18)

1. J Bhardwaj and H Ashraf, "Advanced silicon etching using high density plasmas", Proc. Int. Sym. on Micromachining and Microfabrication, SPIE-2639, pp.224-233, Austin (USA), 1995
2. J Bhardwaj, H Ashraf and A McQuarrie, "Dry Silicon Etching for MEMS", Symp. Microstructures and Microfabricated Systems, Annual Meeting of the Electrochemical Society (ECS), Montreal (Canada), 1997
3. A Ayón R Braff, C Lin, H Sawin and M Schmidt, "Characterisation of a Time Multiplexed Inductively Coupled Plasma Etcher", Journal of the Electrochemical Society 146.1, pp.339-349, 1999
4. M E McNie, D O King, C A Vizard, A S Holmes and K W Lee, "High aspect ratio micromachining (HARM) technologies for microinertial devices", J. Microsystems Technologies, 6, pp. 184-188, 2000
5. C Gormley, K Yallup, W A Nevin, J Bhardwaj, H Asraf, P Huggett and S Blackstone, "State of the Art Deep Silicon Anisotropic Etching on SOI Bonded Substrates for Dielectric Isolation and MEMS Applications", Int. Wafer Bonding Symposium, Annual Meeting of the Electrochemical Society, ECS 99-35, p.350, Hawaii (USA), 1999
6. C Gormley, A Boyle, V Srigengan and S Blackstone, "HARM Processing Techniques for MEMS and MOEMS Devices using Bonded SOI Substrates and DRIE", Int. Micromachining & Microfabrication Symposium, SPIE-4174, pp.98-110, Santa Clara (USA), 2000
7. S Blackstone and T Brosnian, "SOI MEMS Technologies for Optical Switching", IEEE/LEOS Int. Conf. on Optical MEMS, pp.35-36, Okinawa (Japan), 2001
8. M J Walker, "Comparison of Bosch and cryogenic processes for patterning high aspect ratio features in silicon", Proc. Int. Conf. on Microelectronic and MEMS Technologies, SPIE-4407, pp.89-99, Edinburgh (UK), 2001
9. A L Rickard and M E McNie, "Characterisation and optimisation of deep dry etching for MEMS applications", Proc. Int. Conf. on Microelectronic and MEMS Technologies, SPIE-4407, pp.78-88, Edinburgh (UK), 2001
10. F Laermer and A Schilp, "Method of aniotropically etching silicon", patent no. DE4241045 (US5501893), 1994
11. M E McNie and D O King, "CMOS compatibility of High Aspect Ratio Micromachining (HARM) in bonded Silicon-on-Insulator (BSOI)", Int. Micromachining & Microfabrication Symposium, SPIE-3511, pp.277-287, Santa Clara (USA), 1998
12. J Hopkins, H Ashraf, J Bhardwaj, A Hynes, I Johnston, J. Shepherd, "The benefits of process parameter ramping during the plasma etching of high aspect ratio silicon structures", Proc. Materials Research Society (MRS) Fall Meeting, Boston (USA), 1998
13. D M Haynes, B Khamsehpour, H Ashraf, J Hopkins, J Bhardwaj, A Hynes and M E Ryan, "Method of surface treatment of semiconductor substrates", patent no. US6051503, 2000
14. I R Johnston, H Ashraf, J Hopkins, J K Bhardwaj, A M Hynes and L M Lea, "Method and apparatus for etching a substrate" patent no. US6187685, 2001
15. J Kiihamäki, "Deceleration of silicon etch rate at high aspect ratios", J. Vac. Sci. Technol. A-18.4, pp 1385-1389, 2000
16. J Karttunen, J Kiihamäki and S Franssila, "Loading effects in deep silicon etching", Proc. Int. Symp. Micromachining and Microfabrication, SPIE-4174, pp. 90-97, Santa Clara (USA), 2000
17. T Mattila, J Kiihamäki, T Lamminmäki, O Jaakkola, P Rantakari, A Oja, H Seppä, H Kattelus and I Tittonen, "A 12MHz micromechanical bulk acoustic mode resonator", Sensors and Actuators A-101, pp. 1-9, 2002
18. F. Roozeboom, R Elfrink, T G S M Rijks, J Verhoeven, A Kemmeren and J van den Meerakker, "High-Density, Low-Loss MOS Capacitors for Integrated RF Decoupling", Int. J. Microcircuits and Electronic Packaging 24.3, pp. 182-196, 2001