Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models

Proceedings - Design Automation Conference

Volumn , Issue , 2003, Pages 668-673

  Krstic, A ^a   Wang, L C ^a   Cheng, K T ^a   Liou, J J ^b   Mak, T M ^c  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^c INTEL CORPORATION   (United States)

Author keywords

Delay ATPG; Delay fault diagnosis; Statistical timing models

Indexed keywords

ALGORITHMS; BENCHMARKING; ELECTRIC FAULT LOCATION; LOGIC DESIGN; MICROPROCESSOR CHIPS; PERFORMANCE; STATISTICAL METHODS;

DELAY FAULT DIAGNOSIS; STATISTICAL TIMING MODELS;

DELAY CIRCUITS;

EID: 0042134665     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/775999.776001     Document Type: Conference Paper

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