Nanometer technology effects on fault models for IC testing

Computer

Volumn 32, Issue 11, 1999, Pages 46-51

  Aitken, Robert C ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

NANOMETER TECHNOLOGY; REGISTER-TRANSFER-LEVEL (RTL);

BOOLEAN FUNCTIONS; CRYSTAL DEFECTS; ELECTRIC FAULT CURRENTS; GATES (TRANSISTOR); MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; NANOTECHNOLOGY;

INTEGRATED CIRCUIT TESTING;

EID: 0033221624     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/2.803640     Document Type: Article

References (2)

1. The 1997 National Technology Roadmap for Semiconductors, Semiconductor Industry Assoc., San Jose, Calif., 1997.
2. T.W. Williams, "Testing in Nanometer Technologies," Proc. 1999 Design Automation and Test in Europe, IEEE CS Press, Los Alamitos, Calif., 1999, pp. 5-6.