Fabrication of 60-nm transistors on 4-in. wafer using nanoimprint at all lithography levels

Applied Physics Letters

Volumn 83, Issue 8, 2003, Pages 1632-1634

  Zhang, Wei ^a   Chou, Stephen Y ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MULTILAYERS; NANOTECHNOLOGY; STRENGTH OF MATERIALS;

NANOIMPRINT LITHOGRAPHY (NIL);

MOSFET DEVICES;

EID: 0041780663     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1600505     Document Type: Article

References (8)

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