A fully integrated 1 kb magnetoresistive random access memory with a double magnetic tunnel junction

Japanese Journal of Applied Physics, Part 2: Letters

Volumn 42, Issue 7 A, 2003, Pages

  Ikegawa, Sumio ^a,b   Asao, Yoshiaki ^b   Saito, Yoshiaki ^a,b   Takahashi, Shigeki ^a,b   Kai, Tadashi ^a,b   Tsuchida, Kenji ^b   Yoda, Hiroaki ^a,b  

^a MRAM Spintronics R and D Center   (Japan)

^b TOSHIBA CORPORATION   (Japan)

Author keywords

CMOS; Double junction; Magnetic tunnel junction; Memory; MRAM; Tunnel magnetoresistance

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; MAGNETORESISTANCE; OPTIMIZATION; SEMICONDUCTOR JUNCTIONS;

DOUBLE JUNCTIONS;

RANDOM ACCESS STORAGE;

EID: 0041363308     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.42.l745     Document Type: Article

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