A 10ns read and write non-volatile memory array using a magnetic tunnel junction and FET switch in each cell

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 128-129

  Scheuerlein, R ^a   Gallagher, W ^a   Parkin, S ^a   Lee, A ^a   Ray, S ^a   Robertazzi, R ^a   Reohr, W ^a  

^a IBM ALMADEN RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; FIELD EFFECT TRANSISTORS; MAGNETIC STORAGE; MAGNETORESISTANCE; ROM;

MAGNETIC RANDOM ACCESS MEMORY (MRAM);

RANDOM ACCESS STORAGE;

EID: 0034430270     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. The design of a one megabit non-volatile M-R memory chip using 1.5 × 1.5μm cells
2. Magneto-resistive IC memory limitations and architecture limitations
3. Large magnetoresistance at room temperature in ferromagnetic thin film tunnel junctions
4. Microstructured magnetic tunnel junction
5. Exchange-biased magnetic tunnel junctions and application to non-volatile magnetic random access memory