High-performance MRAM technology with an improved magnetic tunnel junction material

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2002, Pages 212-213

  Motoyoshi, Makoto ^a   Moriyama, K ^a   Mori, H ^a   Fukumoto, C ^a   Itoh, H ^a   Kano, H ^a   Bessho, K ^a   Narisaw, H ^a  

^a SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COERCIVE FORCE; MAGNETORESISTANCE; MICROPROCESSOR CHIPS; TUNNEL JUNCTIONS;

MAGNETIC TUNNEL JUNCTIONS (MTJ); MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM);

RANDOM ACCESS STORAGE;

EID: 0036050034     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. A 10ns read and write non-volatile memory array using a magnetic tunnel junction and FET switch in each cell
2. Nonvolatile RAM based on magnetic tunnel/junction elements
3. Recent developments in magnetic tunnel junction MPRAM