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Volumn 20, Issue 3, 2003, Pages 24-31

Electrical modeling of integrated-package power and ground distributions

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; PROBLEM SOLVING; SPURIOUS SIGNAL NOISE; VLSI CIRCUITS;

EID: 0038721090     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2003.1198682     Document Type: Article
Times cited : (4)

References (12)
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    • Power distribution system design methodology and capacitor selection for modern CMOS technology
    • Aug.
    • L. Smith et al., "Power Distribution System Design Methodology and Capacitor Selection for Modern CMOS Technology," IEEE Trans. Advanced Packaging, vol. 22, no. 3, Aug 1999, pp. 284-291.
    • (1999) IEEE Trans. Advanced Packaging , vol.22 , Issue.3 , pp. 284-291
    • Smith, L.1
  • 2
    • 0034474751 scopus 로고    scopus 로고
    • How to efficiently capture on-chip inductance effects: Introducing a new circuit element K
    • ACM Press
    • A. Devgan, H. Ji, and W. Dai, "How to Efficiently Capture On-Chip Inductance Effects: Introducing a New Circuit Element K," Proc. Int'l Conf. Computer-Aided Design (ICCAD 00), ACM Press, 2000, pp. 150-155.
    • (2000) Proc. Int'l Conf. Computer-Aided Design (ICCAD 00) , pp. 150-155
    • Devgan, A.1    Ji, H.2    Dai, W.3
  • 4
    • 0036911591 scopus 로고    scopus 로고
    • Robust and passive model order reduction for circuit containing susceptance elements
    • ACM Press
    • H. Zheng and L.T. Pileggi, "Robust and Passive Model Order Reduction for Circuit Containing Susceptance Elements," Proc. Int'l Conf. Computer-Aided Design (ICCAD 02), ACM Press, 2002, pp. 761-766.
    • (2002) Proc. Int'l Conf. Computer-Aided Design (ICCAD 02) , pp. 761-766
    • Zheng, H.1    Pileggi, L.T.2
  • 5
    • 0031622874 scopus 로고    scopus 로고
    • Layout based frequency dependent inductance and resistance extraction for on-chip interconnect timing analysis
    • ACM Press
    • B. Krauter and S. Mehrotra, "Layout Based Frequency Dependent Inductance and Resistance Extraction for On-Chip Interconnect Timing Analysis," Proc. Design Automation Conf. (DAC 98), ACM Press, 1998, pp. 303-308.
    • (1998) Proc. Design Automation Conf. (DAC 98) , pp. 303-308
    • Krauter, B.1    Mehrotra, S.2
  • 7
    • 0029521458 scopus 로고
    • Generating sparse partial inductance matrices with guaranteed stability
    • IEEE CS Press
    • B. Krauter and L. Pileggi, "Generating Sparse Partial Inductance Matrices with Guaranteed Stability," Proc. Int'l Conf. Computer-Aided Design (ICCAD 95), IEEE CS Press, 1995, pp. 45-52.
    • (1995) Proc. Int'l Conf. Computer-Aided Design (ICCAD 95) , pp. 45-52
    • Krauter, B.1    Pileggi, L.2
  • 9
    • 84893746927 scopus 로고    scopus 로고
    • Window-based susceptance models for large-scale RLC circuit analyses
    • IEEE CS Press
    • H. Zheng et al., "Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses," Proc. Design, Automation, and Test in Europe (DATE 02), IEEE CS Press, 2002, pp. 628-633.
    • (2002) Proc. Design, Automation, and Test in Europe (DATE 02) , pp. 628-633
    • Zheng, H.1
  • 10
    • 0036911569 scopus 로고    scopus 로고
    • INDUCTWISE: Inductance-wise interconnect simulator and extractor
    • ACM Press
    • T.H. Chen et al., "INDUCTWISE: Inductance-Wise Interconnect Simulator and Extractor," Proc. Int'l Conf. Computer-Aided Design (ICCAD 02), ACM Press, 2002, pp. 215-220.
    • (2002) Proc. Int'l Conf. Computer-Aided Design (ICCAD 02) , pp. 215-220
    • Chen, T.H.1
  • 11
    • 0032139262 scopus 로고    scopus 로고
    • PRIMA: Passive reduced-order interconnect macromodeling algorithm
    • Aug.
    • A. Odabasioglu, M. Celik, and L.T. Pileggi, "PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm," IEEE Trans. Computer-Aided Design, vol. 17, no. 8, Aug. 1998, pp. 645-654.
    • (1998) IEEE Trans. Computer-Aided Design , vol.17 , Issue.8 , pp. 645-654
    • Odabasioglu, A.1    Celik, M.2    Pileggi, L.T.3
  • 12
    • 0029699453 scopus 로고    scopus 로고
    • Reliability and characterization of MLC decoupling capacitors with C4 interconnections
    • IEEE
    • D. Scheider et al., "Reliability and Characterization of MLC Decoupling Capacitors with C4 Interconnections," Proc. 46th Electronic Components and Technology Conf., IEEE, 1996, pp. 365-374; http://www.avx.com/ docs/techinfo/c4interc.pdf.
    • (1996) Proc. 46th Electronic Components and Technology Conf. , pp. 365-374
    • Scheider, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.