-
1
-
-
0032187983
-
Differential and pass-transistor CMOS logic for high performance systems
-
V. Oklobdzija, "Differential and Pass-Transistor CMOS Logic for High Performance Systems", Microelectronics Journal, Vol. 29, No. 10, pp. 679-688, 1998.
-
(1998)
Microelectronics Journal
, vol.29
, Issue.10
, pp. 679-688
-
-
Oklobdzija, V.1
-
2
-
-
0032169243
-
Low-power circuit design techniques for multimedia CMOS VLSls
-
T. Kuroda, T. Sakurai, "Low-Power Circuit Design Techniques for Multimedia CMOS VLSls", Electronics and Communications in Japan, Part 3, Vol. 81, No. 9, p. 67-74, 1998.
-
(1998)
Electronics and Communications in Japan, Part 3
, vol.81
, Issue.9
, pp. 67-74
-
-
Kuroda, T.1
Sakurai, T.2
-
3
-
-
0031189144
-
Low-power logic styles: CMOS versus pass-transistor logic
-
R. Zimmermann, W. Fichtner, i "Low-Power Logic Styles: CMOS versus Pass-Transistor Logic", IEEE Journal of Solid-State Circuits, Vol. 32, No. 7, pp. 1079, 1997.
-
(1997)
IEEE Journal of Solid-State Circuits
, vol.32
, Issue.7
, pp. 1079
-
-
Zimmermann, R.1
Fichtner I, W.2
-
4
-
-
0032218681
-
A survey for pass-transistor logic technologies
-
K. Taki, "A Survey for Pass-Transistor Logic Technologies", ASPDAC-98, pp. 223-225, 1998.
-
(1998)
ASPDAC-98
, pp. 223-225
-
-
Taki, K.1
-
5
-
-
0030166924
-
Top-down pass-transistor logic
-
K. Yano, Y. Sasaki, K. Rikino, K. Seki, "Top-Down Pass-Transistor Logic", IEEE Journal of Solid-State Circuits, Vol. 31, No. 6, pp. 792-803, 1996.
-
(1996)
IEEE Journal of Solid-State Circuits
, vol.31
, Issue.6
, pp. 792-803
-
-
Yano, K.1
Sasaki, Y.2
Rikino, K.3
Seki, K.4
-
6
-
-
0032301257
-
Area-oriented synthesis for pass-transistor logic
-
R. Chaudhry, T.-H. Liu, A. Aziz, J. Burns, "Area-Oriented Synthesis for Pass-Transistor Logic", ICCD-98, pp. 160-167, 1998.
-
(1998)
ICCD-98
, pp. 160-167
-
-
Chaudhry, R.1
Liu, T.-H.2
Aziz, A.3
Burns, J.4
-
7
-
-
33847158948
-
Decision diagrams and pass transistor logic synthesis
-
Paper 3.1
-
V. Bertacco, S. Minato, P. Verplaetse, L. Benini, G. De Micheli, "Decision Diagrams and Pass Transistor Logic Synthesis", IWLS-97, Paper 3.1, 1997.
-
(1997)
IWLS-97
-
-
Bertacco, V.1
Minato, S.2
Verplaetse, P.3
Benini, L.4
De Micheli, G.5
-
8
-
-
0031340523
-
Logic synthesis for large pass transistor networks
-
P. Buch, A. Narayan, A. R. Newton, A. L. Sangiovanni-Vincentelli, "Logic Synthesis for Large Pass Transistor Networks", ICCAD-97, pp. 663-670, 1997.
-
(1997)
ICCAD-97
, pp. 663-670
-
-
Buch, P.1
Narayan, A.2
Newton, A.R.3
Sangiovanni-Vincentelli, A.L.4
-
9
-
-
0032311880
-
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits
-
F. Ferrandi, A. Macii, E. Macii, M. Poncino, R. Scarsi, F. Somenzi, "Symbolic Algorithms for Layout-Oriented Synthesis of Pass Transistor Logic Circuits", ICCAD-98, pp. 235-241, 1998.
-
(1998)
ICCAD-98
, pp. 235-241
-
-
Ferrandi, F.1
Macii, A.2
Macii, E.3
Poncino, M.4
Scarsi, R.5
Somenzi, F.6
-
11
-
-
0032218679
-
ALPS: An automatic layouter for pass-transistor cell synthesis
-
Y. Sasaki, K. Rikino, K. Yano, "ALPS: An Automatic Layouter for Pass-Transistor Cell Synthesis", ASPDAC-98, pp. 227-232, 1998.
-
(1998)
ASPDAC-98
, pp. 227-232
-
-
Sasaki, Y.1
Rikino, K.2
Yano, K.3
-
12
-
-
0032636955
-
Transistor level micro-placement and routing for two-dimensional digital vlsi cell synthesis
-
M. A. Riepe, K. A. Sakallah, "Transistor level Micro-Placement and Routing for Two-Dimensional Digital VLSI Cell Synthesis", ISPD-99, pp. 74-81, 1999.
-
(1999)
ISPD-99
, pp. 74-81
-
-
Riepe, M.A.1
Sakallah, K.A.2
-
13
-
-
0002609165
-
A neutral netlist of 10 combinational benchmark circuits and a target translator in fortran
-
F. Brglez, H. Fujiwara, "A Neutral Netlist of 10 Combinational Benchmark Circuits and a Target Translator in Fortran", ISCAS-8S, pp. 785-794, 1985.
-
(1985)
ISCAS-8S
, pp. 785-794
-
-
Brglez, F.1
Fujiwara, H.2
-
15
-
-
84869986550
-
The layout synthesizer: An automatic block generation system
-
1.1-11.1.4
-
S. Chow, H. Chang, J. Lam, Y. Liao, "The Layout Synthesizer: An Automatic Block Generation System", CICC9S, pp. 11.1.1-11.1.4. 1992.
-
(1992)
CICC9S
, pp. 11
-
-
Chow, S.1
Chang, H.2
Lam, J.3
Liao, Y.4
|