Area-oriented synthesis for pass-transistor logic

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1998, Pages 160-167

  Chaudhry, Rajat ^a   Liu, Tai Hung ^a   Aziz, Adnan ^a   Burns, Jeffrey L ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; OPTIMIZATION; REDUNDANCY;

AREA ORIENTED SYNTHESIS; BINARY DECISION DIAGRAMS; PASS TRANSISTOR LOGIC;

LOGIC CIRCUITS;

EID: 0032301257     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (27)