Process induced stresses of a flip-chip packaging by sequential processing modeling technique

Journal of Electronic Packaging, Transactions of the ASME

Volumn 120, Issue 3, 1998, Pages 309-313

  Wang, J ^a   Qian, Z ^a   Liu, S ^a  

^a WAYNE STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRONICS PACKAGING; FINITE ELEMENT METHOD; PROCESS ENGINEERING; SOLDERED JOINTS; STRESS ANALYSIS;

FLIP CHIP DEVICES;

EID: 0032163194     PISSN: 10437398     EISSN: 15289044     Source Type: Journal    
DOI: 10.1115/1.2792638     Document Type: Article

References (10)

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