Minimum buffered routing with bounded capacitive load for slew rate and reliability control

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 22, Issue 3, 2003, Pages 241-253

  Alpert, Charles J ^a   Kahng, Andrew B ^b   Liu, Bao ^b   Mǎndoiu, Ion I ^b   Zelikovsky, Alexander Z ^c  

^a IBM   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c GEORGIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CAPACITANCE; DIGITAL INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; RELIABILITY; SPURIOUS SIGNAL NOISE;

MINIMUM BUFFER ROUTING PROBLEM; SIGNAL DEGRADATION;

VLSI CIRCUITS;

EID: 0037346796     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2002.807888     Document Type: Article

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