A current-based reference-generation scheme for 1T-1C ferroelectric random-access memories

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 3, 2003, Pages 541-549

  Siu, Joseph Wai Kit ^a,b   Eslami, Yadollah ^a   Sheikholeslami, Ali ^a   Gulak, P Glenn ^a   Endo, Toru ^c   Kawashima, Shoichiro ^c  

^a UNIVERSITY OF TORONTO   (Canada)

^b QUALCOMM INC   (United States)

^c FUJITSU LABORATORIES LTD   (Japan)

Author keywords

1T 1C; Ferroelectric memory; Memory circuit design; Nonvolatile; Reference generation; Sensing scheme

Indexed keywords

AMPLIFIERS (ELECTRONIC); ELECTRIC CURRENTS; ELECTRIC POWER SUPPLIES TO APPARATUS; FERROELECTRIC DEVICES; INTEGRATED CIRCUIT LAYOUT; NONVOLATILE STORAGE; RANDOM ACCESS STORAGE; TEMPERATURE;

FERROELECTRIC MEMORY; FERROELECTRIC RANDOM ACCESS MEMORIES; MEMORY CELLS; REFERENCE CELLS; REFERENCE GENERATION SCHEME;

INTEGRATED CIRCUIT TESTING;

EID: 0037346055     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.808289     Document Type: Article

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