메뉴 건너뛰기




Volumn 51, Issue 2, 2003, Pages 575-583

Low-power filtering via adaptive error-cancellation

Author keywords

Adaptive filtering; Algorithm transformations; Algorithmic noise tolerance; Fault tolerance; Low power; Soft DSP; Voltage scaling

Indexed keywords

ALGORITHMS; COMMUNICATION SYSTEMS; COMPUTER SIMULATION; DIGITAL FILTERS; ELECTRIC POTENTIAL; FAULT TOLERANT COMPUTER SYSTEMS; FREQUENCY DIVISION MULTIPLEXING;

EID: 0037306141     PISSN: 1053587X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSP.2002.806989     Document Type: Article
Times cited : (50)

References (34)
  • 1
    • 0029292445 scopus 로고
    • CMOS scaling for high-performance and low power-The next ten years
    • Apr.
    • B. Davari, R. H. Dennard, and G. G. Shahidi, "CMOS scaling for high-performance and low power-The next ten years," Proc. IEEE, vol. 83, pp. 595-606, Apr. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 595-606
    • Davari, B.1    Dennard, R.H.2    Shahidi, G.G.3
  • 2
    • 0031212817 scopus 로고    scopus 로고
    • Supply and threshold voltage scaling for low power CMOS
    • Aug.
    • R. Gonzalez, B. M. Gordon, and M. A. Horowitz, "Supply and threshold voltage scaling for low power CMOS," IEEE J. Solid-State Circuits, vol. 32, pp. 1210-1216, Aug. 1997.
    • (1997) IEEE J. Solid-State Circuits , vol.32 , pp. 1210-1216
    • Gonzalez, R.1    Gordon, B.M.2    Horowitz, M.A.3
  • 3
    • 0027940828 scopus 로고
    • Low-power design: Ways to approach the limits
    • E. A. Vittoz, "Low-power design: Ways to approach the limits," in Proc. ISSCC, 1994, pp. 14-18.
    • (1994) Proc. ISSCC , pp. 14-18
    • Vittoz, E.A.1
  • 4
    • 0029293575 scopus 로고
    • Minimizing power consumption in digital CMOS circuits
    • Apr.
    • A. P. Chandrakasan and R. W. Brodersen, "Minimizing power consumption in digital CMOS circuits," Proc. IEEE, vol. 83, pp. 498-523, Apr. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 498-523
    • Chandrakasan, A.P.1    Brodersen, R.W.2
  • 5
    • 0030403625 scopus 로고    scopus 로고
    • Noise in deep submicron digital design
    • K. L. Shepard and V. Narayanan, "Noise in deep submicron digital design," in Proc. ICCAD, 1996, pp. 524-531.
    • (1996) Proc. ICCAD , pp. 524-531
    • Shepard, K.L.1    Narayanan, V.2
  • 6
    • 0028444931 scopus 로고
    • Noise in digital dynamic CMOS circuits
    • June
    • P. Larsson and C. Svensson, "Noise in digital dynamic CMOS circuits," IEEE J. Solid-State Circuits, vol. 29, pp. 655-662, June 1994.
    • (1994) IEEE J. Solid-State Circuits , vol.29 , pp. 655-662
    • Larsson, P.1    Svensson, C.2
  • 8
    • 0031672575 scopus 로고    scopus 로고
    • Moore's law governs the silicon revolution
    • Jan.
    • P. K. Bondyopadhyay, "Moore's law governs the silicon revolution," Proc. IEEE, vol. 86, pp. 78-81, Jan. 1998.
    • (1998) Proc. IEEE , vol.86 , pp. 78-81
    • Bondyopadhyay, P.K.1
  • 9
    • 0031269121 scopus 로고    scopus 로고
    • A mathematical basis for power-reduction in digital VLSI systems
    • Nov.
    • N. R. Shanbhag, "A mathematical basis for power-reduction in digital VLSI systems," IEEE Trans. Circuits Syst. II, vol. 44, pp. 935-951, Nov. 1997.
    • (1997) IEEE Trans. Circuits Syst. II , vol.44 , pp. 935-951
    • Shanbhag, N.R.1
  • 10
    • 0012773461 scopus 로고    scopus 로고
    • Toward achieving energy-efficiency in presence of deep submicron noise
    • to be published
    • R. Hedge and N. R. Shanbhag, "Toward achieving energy-efficiency in presence of deep submicron noise," IEEE Trans. VLSI Syst., to be published.
    • IEEE Trans. VLSI Syst.
    • Hedge, R.1    Shanbhag, N.R.2
  • 11
    • 0033684153 scopus 로고    scopus 로고
    • Energy-efficiency bounds for noise-tolerant dynamic circuits
    • May
    • N. R. Shanbhag and L. Wang, "Energy-efficiency bounds for noise-tolerant dynamic circuits," in Proc. Int. Symp. Circuits Syst., May 2000, pp. 273-276.
    • (2000) Proc. Int. Symp. Circuits Syst. , pp. 273-276
    • Shanbhag, N.R.1    Wang, L.2
  • 12
    • 0035706021 scopus 로고    scopus 로고
    • Soft digital signal processing
    • Dec.
    • R. Hegde and N. R. Shanbhag, "Soft digital signal processing," IEEE Trans. VLSI Syst., vol. 9, pp. 813-823, Dec. 2001.
    • (2001) IEEE Trans. VLSI Syst. , vol.9 , pp. 813-823
    • Hegde, R.1    Shanbhag, N.R.2
  • 13
    • 0035247081 scopus 로고    scopus 로고
    • The twin-transistor noise-tolerant dynamic circuit technique
    • Feb.
    • G. Balamurugan and N. R. Shanbhag, "The twin-transistor noise-tolerant dynamic circuit technique," IEEE J. Solid-State Circuits, vol. 36, pp. 273-280, Feb. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , pp. 273-280
    • Balamurugan, G.1    Shanbhag, N.R.2
  • 15
    • 0001155626 scopus 로고    scopus 로고
    • Generalized algorithm-based fault tolerance: Error correction via Kalman estimation
    • June
    • G. R. Redinbo, "Generalized algorithm-based fault tolerance: Error correction via Kalman estimation," IEEE Trans. Comput., vol. 47, pp. 639-655, June 1998.
    • (1998) IEEE Trans. Comput. , vol.47 , pp. 639-655
    • Redinbo, G.R.1
  • 16
    • 85008048796 scopus 로고    scopus 로고
    • Fault-tolerant VLSI systems
    • June
    • R. Karri, "Fault-tolerant VLSI systems," IEEE Trans. Rel., vol. 48, pp. 106-107, June 1999.
    • (1999) IEEE Trans. Rel. , vol.48 , pp. 106-107
    • Karri, R.1
  • 17
    • 0031366107 scopus 로고    scopus 로고
    • A comprehensive reconfiguration scheme for fault-tolerant VLSI/WSI array processors
    • Dec.
    • Y. Y. Chen, S. J. Upadhyaya, and C. H. Cheng, "A comprehensive reconfiguration scheme for fault-tolerant VLSI/WSI array processors," IEEE Trans. Comput., vol. 46, pp. 1363-1371, Dec. 1997.
    • (1997) IEEE Trans. Comput. , vol.46 , pp. 1363-1371
    • Chen, Y.Y.1    Upadhyaya, S.J.2    Cheng, C.H.3
  • 22
    • 0031364680 scopus 로고    scopus 로고
    • An overview of broad-band access technologies
    • Dec.
    • M. Gagnaire, "An overview of broad-band access technologies," Proc. IEEE, vol. 85, pp. 1958-1972, Dec. 1997.
    • (1997) Proc. IEEE , vol.85 , pp. 1958-1972
    • Gagnaire, M.1
  • 24
  • 25
    • 0033329507 scopus 로고    scopus 로고
    • Dynamic algorithm transformations for low-power reconfigurable adaptive equalizer
    • Oct.
    • M. Goel and N. R. Shanbhag, "Dynamic algorithm transformations for low-power reconfigurable adaptive equalizer," IEEE Trans. Signal Processing, vol. 47, pp. 2821-2832, Oct. 1999.
    • (1999) IEEE Trans. Signal Processing , vol.47 , pp. 2821-2832
    • Goel, M.1    Shanbhag, N.R.2
  • 26
    • 0032661169 scopus 로고    scopus 로고
    • Sequence compaction for power estimation: Theory and practice
    • July
    • R. Marculescu, D. Marculescu, and M. Pedram, "Sequence compaction for power estimation: Theory and practice," IEEE Trans. Comput.-Aided Design, vol. 18, pp. 973-993, July 1999.
    • (1999) IEEE Trans. Comput.-Aided Design , vol.18 , pp. 973-993
    • Marculescu, R.1    Marculescu, D.2    Pedram, M.3
  • 27
    • 0034135612 scopus 로고    scopus 로고
    • Power modeling for high-level power estimation
    • Feb.
    • S. Gupta and F. N. Najm, "Power modeling for high-level power estimation," IEEE Trans VLSI Syst., vol. 8, pp. 18-29, Feb. 2000.
    • (2000) IEEE Trans VLSI Syst. , vol.8 , pp. 18-29
    • Gupta, S.1    Najm, F.N.2
  • 30
    • 0032099950 scopus 로고    scopus 로고
    • Finite-precision analysis of the pipelined strength-reduced adaptive filter
    • June
    • M. Goel and N. R. Shanbhag, "Finite-precision analysis of the pipelined strength-reduced adaptive filter," IEEE Trans. Signal Processing, vol. 46, pp. 1763-1769, June 1998.
    • (1998) IEEE Trans. Signal Processing , vol.46 , pp. 1763-1769
    • Goel, M.1    Shanbhag, N.R.2
  • 31
    • 0021375063 scopus 로고
    • A roundoff error analysis of the LMS adaptive algorithm
    • Feb.
    • C. Caraiscos and B. Liu, "A roundoff error analysis of the LMS adaptive algorithm," IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-32, pp. 34-41, Feb. 1984.
    • (1984) IEEE Trans. Acoust., Speech, Signal Processing , vol.ASSP-32 , pp. 34-41
    • Caraiscos, C.1    Liu, B.2
  • 32
    • 0015724965 scopus 로고
    • A two's complement parallel array multiplication algorithm
    • Dec.
    • C. R. Baugh and B. A. Wooley, "A two's complement parallel array multiplication algorithm," IEEE Trans. Comput., vol. C-22, pp. 1045-1047, Dec. 1973.
    • (1973) IEEE Trans. Comput. , vol.C-22 , pp. 1045-1047
    • Baugh, C.R.1    Wooley, B.A.2
  • 33
    • 0028573885 scopus 로고
    • Statistical estimation of the switching activity in digital circuits
    • June
    • M. G. Xakellis and F. N. Najm, "Statistical estimation of the switching activity in digital circuits," in Proc. Design Automat. Conf., June 1994, pp. 728-733.
    • (1994) Proc. Design Automat. Conf. , pp. 728-733
    • Xakellis, M.G.1    Najm, F.N.2
  • 34
    • 0016494785 scopus 로고
    • FIR digital filter design techniques using weighted Chebyshev approximation
    • Apr.
    • L.R. Rabiner, J. H. McClellan, and T. W. Parks, "FIR digital filter design techniques using weighted Chebyshev approximation," Proc. IEEE, vol. 63, pp. 595-610, Apr. 1975.
    • (1975) Proc. IEEE , vol.63 , pp. 595-610
    • Rabiner, L.R.1    McClellan, J.H.2    Parks, T.W.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.