-
1
-
-
0004245602
-
International technology roadmap for semiconductors
-
Semiconductor Industry Association, San Jose, CA
-
"International Technology Roadmap for Semiconductors," Semiconductor Industry Association, San Jose, CA, 2001.
-
(2001)
-
-
-
2
-
-
0030289752
-
Gate capacitance attenuation in MOS devices with thin gate dielectric
-
Nov.
-
K. S. Krisch, J. D. Bude, and L. Manchanda, "Gate capacitance attenuation in MOS devices with thin gate dielectric," IEEE Electron Device Lett., vol. 17, pp. 521-524, Nov. 1996.
-
(1996)
IEEE Electron Device Lett.
, vol.17
, pp. 521-524
-
-
Krisch, K.S.1
Bude, J.D.2
Manchanda, L.3
-
3
-
-
0031177159
-
Thin oxide thickness extraction from capacitance-voltage measurements
-
July
-
S. V. Walstra and C.-T. Sah, "Thin oxide thickness extraction from capacitance-voltage measurements," IEEE Trans. Electron Devices, vol. 44, pp. 1136-1142, July 1997.
-
(1997)
IEEE Trans. Electron Devices
, vol.44
, pp. 1136-1142
-
-
Walstra, S.V.1
Sah, C.-T.2
-
4
-
-
0030683249
-
+ polysilicon-gated ultrathin oxides
-
+ polysilicon-gated ultrathin oxides," in Proc. VLSI Symp. Tech. Dig., 1997, pp. 149-150.
-
Proc. VLSI Symp. Tech. Dig., 1997
, pp. 149-150
-
-
Lo, S.-H.1
Buchanan, D.A.2
Taur, Y.3
Han, L.-K.4
Wu, E.5
-
5
-
-
84886448116
-
Physical oxide thickness extraction using quantum mechanical simulation
-
C. Bowen, C. L. Ferando, G. Klimeck, A. Chatterjee, D. Blanks, R. Lake, J. Hu, J. Davis, M. Kulkarni, S. Hattangady and I.-C. Chen, "Physical oxide thickness extraction using quantum mechanical simulation," in IEDM Tech. Dig., 1997, pp. 869-872.
-
(1997)
IEDM Tech. Dig.
, pp. 869-872
-
-
Bowen, C.1
Ferando, C.L.2
Klimeck, G.3
Chatterjee, A.4
Blanks, D.5
Lake, R.6
Hu, J.7
Davis, J.8
Kulkarni, M.9
Hattangady, S.10
Chen, I.-C.11
-
6
-
-
0033688062
-
Improved method for the oxide thickness extraction in MOS structure with ultrathin gate dielectrics
-
May
-
G. Ghibaude, S. Bruyere, T. Devoivre, B. DeSalvo, and E. Vincent, "Improved method for the oxide thickness extraction in MOS structure with ultrathin gate dielectrics," IEEE Trans. Semiconduct. Manufact., vol. 13, pp. 152-158, May 2000.
-
(2000)
IEEE Trans. Semiconduct. Manufact.
, vol.13
, pp. 152-158
-
-
Ghibaude, G.1
Bruyere, S.2
Devoivre, T.3
Desalvo, B.4
Vincent, E.5
-
7
-
-
0036611166
-
Analytical quantum mechanical model for accumulation capacitance of MOS structures
-
June
-
S. Saito, K. Torii, M. Hiratani, and T. Onai, "Analytical quantum mechanical model for accumulation capacitance of MOS structures," IEEE Electron Device Lett., vol. 23, pp. 348-350, June 2002.
-
(2002)
IEEE Electron Device Lett.
, vol.23
, pp. 348-350
-
-
Saito, S.1
Torii, K.2
Hiratani, M.3
Onai, T.4
-
8
-
-
0035124973
-
A comparison of quantum-mechanical capacitance-voltage simulators
-
Jan.
-
C. A. Richter, A. R. Hefner, and E. M. Vogel, "A comparison of quantum-mechanical capacitance-voltage simulators," IEEE Electron Device Lett., vol. 22, pp. 35-37, Jan. 2001.
-
(2001)
IEEE Electron Device Lett.
, vol.22
, pp. 35-37
-
-
Richter, C.A.1
Hefner, A.R.2
Vogel, E.M.3
-
9
-
-
0037094905
-
Experimental determination of equivalent oxide thickness of gate insulators
-
A. Hiraiwa, S. Sakai, D. Ishikawa, and M. Nakazawa, "Experimental determination of equivalent oxide thickness of gate insulators," J. Appl. Phys., vol. 91, no. 10, pp. 6571-6579, 2002.
-
(2002)
J. Appl. Phys.
, vol.91
, Issue.10
, pp. 6571-6579
-
-
Hiraiwa, A.1
Sakai, S.2
Ishikawa, D.3
Nakazawa, M.4
-
10
-
-
0028747841
-
On the universality of inversion layer mobility in Si MOSFETs - Part I: Effects of substrate concentration
-
Dec.
-
S. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the universality of inversion layer mobility in Si MOSFETs - Part I: Effects of substrate concentration," IEEE Trans. Electron Devices, vol. 41, pp. 2357-2361, Dec. 1994.
-
(1994)
IEEE Trans. Electron Devices
, vol.41
, pp. 2357-2361
-
-
Takagi, S.1
Toriumi, A.2
Iwase, M.3
Tango, H.4
|