Methods for true power minimization

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2002, Pages 35-42

  Brodersen, Robert W ^a   Horowitz, Mark A ^b   Markovic, Dejan ^a   Nikolic, Borivoje ^a   Stojanovic, Vladimir ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ENERGY REDUCTION; ENERGY SAVINGS; GATE SIZING; POWER MINIMIZATION; SUPPLY VOLTAGE;

ADDERS; ELECTRIC INVERTERS; ELECTRIC NETWORK TOPOLOGY; INTEGRATED CIRCUIT LAYOUT; THRESHOLD VOLTAGE;

CMOS INTEGRATED CIRCUITS;

EID: 0036916414     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/774572.774578     Document Type: Conference Paper

References (19)

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