Energy efficient address assignment through minimized memory row switching

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2002, Pages 577-581

  Hettiaratchi, Sambuddhi ^a   Cheung, Peter Y K ^a   Clarke, Thomas J W ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

Address assignment; Data layout; Memory synthesis

Indexed keywords

ADDRESS ASSIGNMENT; DATA LAYOUT; MEMORY SYNTHESIS; MINIMIZED MEMORY ROW SWITCHING; MULTI-WAY GRAPH PARTITIONING PROBLEM;

ALGORITHMS; CELLULAR ARRAYS; DATA TRANSFER; GRAPH THEORY; LOGIC DESIGN; OPTIMIZATION; PERFORMANCE;

STORAGE ALLOCATION (COMPUTER);

EID: 0036907179     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/774572.774657     Document Type: Conference Paper

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