Performance-area trade-off of address generators for address decoder-decoupled memory

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2002, Pages 902-908

  Hettiaratchi, Sambuddhi ^a   Cheung, Peter Y K ^a   Clarke, Thomas J W ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ADDRESS DECODERS; ADDRESS GENERATORS; MEMORY CELL ARRAYS; MEMORY MODELING; MEMORY SYNTHESIS; MULTIMEDIA APPLICATIONS; NUMBER OF DATUM;

DECODING; EXHIBITIONS; SHIFT REGISTERS;

RANDOM ACCESS STORAGE;

EID: 0012111579     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2002.998407     Document Type: Conference Paper

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