-
1
-
-
0032202596
-
High-level power modeling, estimation, and optimization
-
Nov.
-
E. Macii, M. Pedram, and F. Somenzi, "High-level power modeling, estimation, and optimization," IEEE Trans. Computer-Aided Design, vol. 17, pp. 1061-1079, Nov. 1998.
-
(1998)
IEEE Trans. Computer-Aided Design
, vol.17
, pp. 1061-1079
-
-
Macii, E.1
Pedram, M.2
Somenzi, F.3
-
2
-
-
0028715171
-
Saving power in the control path of embedded processors
-
C. L. Su, C. Y. Tsui, and A. M. Despain, "Saving power in the control path of embedded processors," IEEE Design Test Comput., vol. 11, no. 4, pp. 24-30, 1994.
-
(1994)
IEEE Design Test Comput.
, vol.11
, Issue.4
, pp. 24-30
-
-
Su, C.L.1
Tsui, C.Y.2
Despain, A.M.3
-
3
-
-
35048834531
-
Bus-invert coding for low-power I/O
-
Jan.
-
M. R. Stan and W. P. Burleson, "Bus-invert coding for low-power I/O," IEEE Trans. VLSI Syst., vol. 3, pp. 49-58, Jan. 1995.
-
(1995)
IEEE Trans. VLSI Syst.
, vol.3
, pp. 49-58
-
-
Stan, M.R.1
Burleson, W.P.2
-
4
-
-
0030644909
-
Asymptotic zero-transition activity encoding for address buses in low-power microprocessor-based systems
-
L. Benini, G. De Micheli, E. Macii, D. Sciuto, and C. Silvano, "Asymptotic zero-transition activity encoding for address buses in low-power microprocessor-based systems," in IEEE/ACM Great Lakes Symposium on VLSI, Urbana-Champaign, IL, Mar. 1997, pp. 70-75.
-
IEEE/ACM Great Lakes Symposium on VLSI, Urbana-Champaign, IL, Mar. 1997
, pp. 70-75
-
-
Benini, L.1
De Micheli, G.2
Macii, E.3
Sciuto, D.4
Silvano, C.5
-
5
-
-
0032300757
-
Reducing power consumption of core-based systems by address bus encoding
-
Dec.
-
L. Benini ,G. De Micheli, E. Macii, M. Poncino, and S. Quer, "Reducing power consumption of core-based systems by address bus encoding," IEEE Trans. VLSI Syst., vol. 6, pp. 554-562, Dec. 1998.
-
(1998)
IEEE Trans. VLSI Syst.
, vol.6
, pp. 554-562
-
-
Benini, L.1
De Micheli, G.2
Macii, E.3
Poncino, M.4
Quer, S.5
-
6
-
-
0032287846
-
Working-zone encoding for reducing the energy in microprocessor address buses
-
Dec.
-
E. Musoll, T. Lang, and J. Cortadella, "Working-zone encoding for reducing the energy in microprocessor address buses," IEEE Trans. VLSI Syst., vol. 6, pp. 568-572, Dec. 1998.
-
(1998)
IEEE Trans. VLSI Syst.
, vol.6
, pp. 568-572
-
-
Musoll, E.1
Lang, T.2
Cortadella, J.3
-
7
-
-
0034258724
-
Architectures and synthesis algorithms for power-efficient bus interfaces
-
Sept.
-
L. Benini, A. Macii, E. Macii, M Poncino, and R. Scarsi, "Architectures and synthesis algorithms for power-efficient bus interfaces," IEEE Trans. Computer-Aided Design, vol. 19, pp. 969-980, Sept. 1999.
-
(1999)
IEEE Trans. Computer-Aided Design
, vol.19
, pp. 969-980
-
-
Benini, L.1
Macii, A.2
Macii, E.3
Poncino, M.4
Scarsi, R.5
-
8
-
-
0001868375
-
Global communication and memory optimizing transformations for low power design
-
S. Wuytack, F. Catthoor, L. Nachtergaele, and H. De Man, "Global communication and memory optimizing transformations for low power design," in ACM/IEEE Int. Workshop Low-Power Design, Napa Valley, CA, Apr. 1994, pp. 203-208.
-
ACM/IEEE Int. Workshop Low-Power Design, Napa Valley, CA, Apr. 1994
, pp. 203-208
-
-
Wuytack, S.1
Catthoor, F.2
Nachtergaele, L.3
De Man, H.4
-
9
-
-
0029776652
-
Reducing address bus transitions for low power memory mapping
-
P. R. Panda and N. D. Dutt, "Reducing address bus transitions for low power memory mapping," in IEEE Eur. Design Test Conf., Paris, France, Mar. 1996, pp. 63-67.
-
IEEE Eur. Design Test Conf., Paris, France, Mar. 1996
, pp. 63-67
-
-
Panda, P.R.1
Dutt, N.D.2
-
10
-
-
0029720161
-
Low power mapping of behavioral array to multiple memories
-
____, "Low power mapping of behavioral array to multiple memories," in ACM/IEEE Int. Symp. Low Power Electronics and Design, Monterey, CA, Aug. 1996, pp. 289-292.
-
ACM/IEEE Int. Symp. Low Power Electronics and Design, Monterey, CA, Aug. 1996
, pp. 289-292
-
-
Panda, P.R.1
Dutt, N.D.2
-
11
-
-
0032303141
-
Formalized methodology for data reuse exploration in hierarchical memory mappings
-
Dec.
-
J. P. Diguet, S. Wuytack, F. Catthoor, and H. De Man, "Formalized methodology for data reuse exploration in hierarchical memory mappings," IEEE Trans. VLSI Syst., vol. 6, pp. 529-537, Dec. 1998.
-
(1998)
IEEE Trans. VLSI Syst.
, vol.6
, pp. 529-537
-
-
Diguet, J.P.1
Wuytack, S.2
Catthoor, F.3
De Man, H.4
-
12
-
-
0002945337
-
Embedded control problems, thumb and the ARM7TDMI
-
Oct.
-
S. Segar, K. Clarke, and L. Goudge, "Embedded control problems, thumb and the ARM7TDMI," IEEE Micro, vol. 15, no. 5, pp. 22-30, Oct. 1995.
-
(1995)
IEEE Micro
, vol.15
, Issue.5
, pp. 22-30
-
-
Segar, S.1
Clarke, K.2
Goudge, L.3
-
13
-
-
0030650199
-
An object code compression approach to embedded processors
-
Y. Yoshida, B.-Y. Song, H. Okuhata, T. Onoye, and I. Shirakawa, "An object code compression approach to embedded processors," in ACM/IEEE Int. Symp. Low Power Electronics and Design, Monterey, CA, Aug. 1997, pp. 265-268.
-
ACM/IEEE Int. Symp. Low Power Electronics and Design, Monterey, CA, Aug. 1997
, pp. 265-268
-
-
Yoshida, Y.1
Song, B.-Y.2
Okuhata, H.3
Onoye, T.4
Shirakawa, I.5
-
14
-
-
0032119586
-
Code density optimization for embedded DSP processors using data compression techniques
-
July
-
S. Y. Liao, S. Devadas, and K. Keutzer, "Code density optimization for embedded DSP processors using data compression techniques," IEEE Trans. Computer-Aided Design, vol. 17, pp. 601-608, July 1998.
-
(1998)
IEEE Trans. Computer-Aided Design
, vol.17
, pp. 601-608
-
-
Liao, S.Y.1
Devadas, S.2
Keutzer, K.3
-
15
-
-
0031645149
-
Code compression for embedded systems
-
H. Lekatsas and W. Wolf, "Code compression for embedded systems," in ACM/IEEE Design Automation Conf., San Francisco, CA, June 1998, pp. 23-28.
-
ACM/IEEE Design Automation Conf., San Francisco, CA, June 1998
, pp. 23-28
-
-
Lekatsas, H.1
Wolf, W.2
-
16
-
-
0032141085
-
Trends in embedded microprocessor design
-
Aug.
-
M. Schlett, "Trends in embedded microprocessor design," IEEE Computer, vol. 31, no. 8, pp. 44-49, Aug. 1998.
-
(1998)
IEEE Computer
, vol.31
, Issue.8
, pp. 44-49
-
-
Schlett, M.1
-
17
-
-
50049113598
-
Region compression: A new scheme for memory energy minimization in embedded systems
-
L. Benini, A. Macii, E. Macii, and M. Poncino, "Region compression: A new scheme for memory energy minimization in embedded systems," in Euromicro Workshop Digital System Design: Architectures, Methods and Tools, Milan, Italy, Sept. 1999, pp. 311-317.
-
Euromicro Workshop Digital System Design: Architectures, Methods and Tools, Milan, Italy, Sept. 1999
, pp. 311-317
-
-
Benini, L.1
Macii, A.2
Macii, E.3
Poncino, M.4
-
19
-
-
0012202711
-
-
Stuttgart, Germany: Dept. of Integrated Systems Engineering Univ. of Stuttgart
-
M. Gumm, VHDL-Modeling and Synthesis of the DLX RISC Processor. Stuttgart, Germany: Dept. of Integrated Systems Engineering Univ. of Stuttgart, 1995.
-
(1995)
VHDL-Modeling and Synthesis of the DLX RISC Processor
-
-
Gumm, M.1
-
20
-
-
0004255753
-
Overview of the Ptolemy project
-
Dept. of Electrical Engineering and Computer Science, Univ. of California, Berkeley, UCB/ERL M99/37
-
J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay, and Y. Xiong, "Overview of the Ptolemy project," Dept. of Electrical Engineering and Computer Science, Univ. of California, Berkeley, UCB/ERL M99/37, 1999.
-
(1999)
-
-
Davis J. II1
Goel, M.2
Hylands, C.3
Kienhuis, B.4
Lee, E.A.5
Liu, J.6
Liu, X.7
Muliadi, L.8
Neuendorffer, S.9
Reekie, J.10
Smyth, N.11
Tsay, J.12
Xiong, Y.13
-
21
-
-
0030644889
-
Trade-off evaluation in embedded system design via co-simulation
-
C. Passerone, L. Lavagno, C. Sansoé, M. Chiodo, and A. Sangiovanni, "Trade-off evaluation in embedded system design via co-simulation," in IEEE Asia South Pacific Design Automation Conf., Chiba, Japan, Jan. 1997, pp. 291-297.
-
IEEE Asia South Pacific Design Automation Conf., Chiba, Japan, Jan. 1997
, pp. 291-297
-
-
Passerone, C.1
Lavagno, L.2
Sansoé, C.3
Chiodo, M.4
Sangiovanni, A.5
-
22
-
-
0029325643
-
A tutorial on MPEG/audio compression
-
D. Pan, "A tutorial on MPEG/audio compression," IEEE Multimedia, vol. 2, no. 2, pp. 60-74, 1995.
-
(1995)
IEEE Multimedia
, vol.2
, Issue.2
, pp. 60-74
-
-
Pan, D.1
-
23
-
-
0035573213
-
Exact and heuristic algorithms for low-energy code compression in performance and memory constrained embedded systems
-
L. Benini, A. Macii, and E. Macii, "Exact and heuristic algorithms for low-energy code compression in performance and memory constrained embedded systems," in IEEE Midwest Symp. Circuits and Systems, Dayton, OH, Aug. 2001, pp. 552-555.
-
IEEE Midwest Symp. Circuits and Systems, Dayton, OH, Aug. 2001
, pp. 552-555
-
-
Benini, L.1
Macii, A.2
Macii, E.3
-
24
-
-
24844464670
-
Static footprint control in code compression for low-energy embedded systems
-
____, "Static footprint control in code compression for low-energy embedded systems," in Int. Workshop Power and Timing Modeling, Optimization and Simulation, Yverdon, Switzerland, Sept. 2001, pp. 3.4.1-3.4.10.
-
Int. Workshop Power and Timing Modeling, Optimization and Simulation, Yverdon, Switzerland, Sept. 2001
-
-
Benini, L.1
Macii, A.2
Macii, E.3
|