Architectures and synthesis algorithms for power-efficient bus interfaces

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 19, Issue 9, 2000, Pages 969-980

  Benini, Luca ^a   Macii, Alberto ^a   Macii, Enrico ^a   Poncino, Massimo ^a   Scarsi, Ricardo ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

BUS ENCODING;

ALGORITHMS; COMPUTER HARDWARE; DECODING; LOGIC CIRCUITS; SIGNAL ENCODING;

INTERFACES (COMPUTER);

EID: 0034258724     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.863637     Document Type: Article

References (10)