Reducing address bus transitions for low power memory mapping

Proceedings of European Design and Test Conference

Volumn , Issue , 1996, Pages 63-67

  Panda, Preeti R ^a   Dutt, Nikil D ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; HEURISTIC METHODS; IMAGE PROCESSING;

ADDRESS BUS TRANSITIONS; LOW POWER MEMORY MAPPING; MEMORY ACCESS PATTERNS;

DATA STORAGE EQUIPMENT;

EID: 0029776652     PISSN: 10661409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)