An innovative, programmable architecture for ultra-low power motion estimation in reduced memory MPEG-4 encoder

IEEE Transactions on Consumer Electronics

Volumn 48, Issue 3, 2002, Pages 702-708

  Alfonso, Daniele ^a   Rovati, Fabrizio ^a   Pau, Danilo ^a   Celetto, Luca ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; IMAGE CODING; MULTIMEDIA SYSTEMS; VIDEO CONFERENCING;

MEMORY REDUCTION;

MOTION ESTIMATION;

EID: 0036703238     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2002.1037064     Document Type: Article

References (28)

1. ISO/IEC 14496-2, "Information Technology - Generic coding of audio-visual objects", Part 2: Visual.
2. 3GPP TS 23.140, "GSM/UMTS Multimedia Messaging Service functional description".
3. M.A. Elgamel, A.M. Shams, M.A. Bayoumi, "A comparative analysis for low power motion estimation VLSI architectures", IEEE workshop on signal processing systems, 2000.
4. S. Kittitornkun, Y.H. Hu, "Frame-level pipelined motion estimation array processor", IEEE transactions on circuits and systems for video technology, Vol. 11, N.2, February 2001.
5. J.-F. Shen, L.G. Chen, H.C. Chang, T.C. Wang, "Low-power full search block matching motion estimation chip for H.263+", ISCAS '99 conference proceedings, Vol.4.
6. L. Sousa, N. Roma, "Low-power array architectures for motion estimation", IEEE third workshop on multimedia signal processing, 1999.
7. V.L. Do, K.Y. Yun, "A low power VLSI architecture for full-search block-matching motion estimation", IEEE transactions on circuits and systems for video technology, Vol.8, N.4, August 1998.
8. H. Yeo, Y.H. Hu, "A novel matching criterion and low power architecture for real-time block based motion estimation", Proceedings of international conference on application specific systems, architectures and processors, 1996.
9. X.-D. Zhang, C.-Y. Tsui, "An efficient and reconfigurable VLSI architecture for different block matching motion estimation algorithms", Proceedings of the international conference on acoustic, speech and signal processing, 1997.
10. T.-H. Chen, "A cost-effective three-step hierarchical search block-matching chip for motion estimation", IEEE journal of solid state circuits, Vol.33, N.8, August 1998.
11. R.S. Richmond II, D.S. Ha, "A low power motion estimation block for low bitrate wireless video", International symposium on low power electronics and design, 2001.
12. H. Yeo, "A modular high-throughput architecture for logarithmic search block-matching motion estimation", IEEE transactions on circuits and systems for video technology, Vol.8 N.3, June 1998.
13. Y.S. Seo, J.H. You, "A VLSI design of hierarchical search motion estimation processor chip", The first IEEE Asia Pacific conference on ASICS, 1999.
14. rd workshop on multimedia signal processing, 1999.
15. S. Zhu, K.-K. Ma, "A new diamond search algorithm for fast block-matching motion estimation", IEEE transactions on image processing, Vol.9, N.2, February 2000.
16. J. Ju, Y.-K. Chen, S.Y. Kung, "A fast rate-optimized motion estimation algorithm for low-bitrate video coding", IEEE transactions on circuits and systems for video technology, Vol.9, N.7, October 1999.
17. Y.-T. Roan, P.-Y. Chen "A fuzzy search algorithm for the estimation of motion vectors", IEEE transactions on broadcasting, Vol.46, N.2, June 2000.
18. S. Li, W.-P. Xu, H. Wang, N.-N. Zheng, "A novel fast motion estimation method based on genetic algorithm", Proceedings of the international conference on image processing, 1999.
19. K.T. Choi, S.C. Chan, T.S. Ng, "A new fast motion estimation algorithm using hexagonal subsampling pattern and multiple candidate search", Proceedings of the international conference on image processing, 1996.
20. Z.-L. He, C.-Y. Tsui, K.-K. Chan, M.L. Liou, "Low-power VLSI design for motion estimation using adaptive pixel truncation", IEEE Transactions on circuits and systems for video technology, Vol10, N.5, August 2000.
21. G. de Haan, P. Biezen, H. Huijgen, O. Ojo, "True motion estimation with 3-D recursive search block matching", IEEE transactions on circuits and systems for video technology, Vol.3, N.5, October 1993.
22. F. Rovati, D. Pau, E. Piccinelli, L. Pezzoni, J.-M. Bard, "An innovative, high-quality and search window independent motion estimation algorithm and architecture for Mpeg-2 encoding", IEEE transactions on consumer electronics, August 2000, Vol.46, N.3.
23. F. Mombers, S. Dogimont, "A limited hardware resources efficient motion estimation algorithm", Proceedings of the IEEE international symposium on circuits and systems, Vol.4, 2000.
24. C. De Vleeschouwer, T. Nilsson, "Motion estimation for low-power video devices", IEEE international conference on image processing, 2001.
25. S.-H. Han, S.-W. Kwon, T.-Y. Lee, M.-K. Lee, "Low power motion estimation algorithm based on temporal correlation and its architecture", Sixth International Symposium on Signal Processing and its Applications, 2001.
26. ISO/IEC 14496-7, "Information Technology - Generic coding of audio-visual objects", Part 7: optimised reference software for coding of audio-visual objects, version 4.0, December 2001.
27. I. Bolsens, H. De Man, B. Lin C.Van Rompaey, S.Vercauteren, D.Verkest, "Hardware/software co-design of digital telecommunication systems", Proceedings of the IEEE, Vol.85, N.3, March 1997.
28. A. Chimienti, M. Lucenteforte, D. Pau, R. Sannino, "A novel co-decoding scheme to reduce memory in Mpeg-2 MP@ML decoder", International Symposium on Signals Systems and Electronics, 1998.