Online testing approach for very deep-submicron ICs

IEEE Design and Test of Computers

Volumn 19, Issue 2, 2002, Pages 16-23

  Favalli, Michele ^b   Metra, Cecilia ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

^b UNIVERSITY OF FERRARA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT DETECTION; ONLINE TESTING; TIMING VERIFICATION; VERY DEEP SUBMICRON TECHNOLOGY;

CROSSTALK; FAILURE ANALYSIS; ONLINE SYSTEMS; TRANSIENTS; VLSI CIRCUITS;

INTEGRATED CIRCUIT TESTING;

EID: 0036495930     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.990438     Document Type: Article

References (12)

1. Nanometer technology effects on fault models for IC testing
2. On-line testing for VLSI-a compendium of approaches
3. Novel design for testability schemes for CMOS ICs
4. Online delay testing of digital circuits
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6. Online detection of logic errors due to crosstalk, delay and transient faults
7. Time redundancy based soft-error tolerance to rescue nanometer technologies
8. Self-checking detection and diagnosis of transient, delay and crosstalk faults affecting bus lines
9. Test generation in VLSI circuits for crosstalk noise
10. Designing networks error detection properties through the fault error relation
11. Simulation and analysis of transient faults in digital circuits