Timing verification of dynamically reconfigurable logic for the Xilinx Virtex FPGA series

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2002, Pages 127-135

  Robertson, Ian ^a   Irvine, James ^a   Lysaght, Patrick ^a   Robinson, David ^a  

^a UNIVERSITY OF STRATHCLYDE   (United Kingdom)

Author keywords

Dynamic Reconfiguration; FPGA; Run Time Reconfiguration; Verification

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER HARDWARE; COMPUTER SOFTWARE; SWITCHING CIRCUITS; TIMING CIRCUITS;

DYNAMIC RECONFIGURABLE LOGIC (DRL);

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0036385195     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/503048.503068     Document Type: Conference Paper

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