Modelling and synthesis of configuration controllers for dynamically reconfigurable logic systems using the DCS CAD framework

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1673, Issue , 1999, Pages 41-50

  Robinson, David ^a   Lysaght, Patrick ^a  

^a UNIVERSITY OF STRATHCLYDE   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; CONTROLLERS; RECONFIGURABLE HARDWARE;

CONTROLLER DESIGNS; DESIGN ITERATION; DYNAMICALLY RECONFIGURABLE LOGIC; GENERIC MODELING; HARDWARE SYNTHESIS; INITIAL ESTIMATE; PARTIAL AUTOMATION; RESOURCE REQUIREMENTS;

COMPUTER AIDED DESIGN;

EID: 33749344067     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-48302-1_5     Document Type: Conference Paper

References (8)

1. M. J. Wirthlin and B. Hutchings, "Improving Functional Density Through Run-Time Constant Propagation", In ACM/SIGDA International Symposium on FPGAs, pp. 86-92. 1997
2. P. Lysaght, G. McGregor and J. Stockwood, "Configuration Controller Synthesis for Dynamically Reconfigurable Systems", in IEE Colloquium on Hardware - Software Cosynthesis for Reconfigurable Systems, HP Labs, Bristol, UK. Feb. 1996
3. N. Shirazi, W. Luk and P.Y.K. Cheung, "Run-Time Management of Dynamically Reconfigurable Designs", in Field Programmable Logic and Applications, pp 59-68, Hartenstein, R. and Keevallik, A. (Eds), Tallinn, Estonia, Sept. 1998
4. D. Robinson, P. Lysaght and G. McGregor, "New CAD Framework Extends Simulation of Dynamically Reconfigurable Logic", in Field Programmable Logic and Applications, pp 1-8, Hartenstein, R. and Keevallik, A. (Eds), Tallinn, Estonia, Sept. 1998
5. P. Lysaght, "Towards an Expert System for a priori Estimation of Reconfiguration Latency in Dynamically Reconfigurable Logic, in Field Programmable Logic and Applications, pp 183-192, Luk, W., Cheung, P., & Glesner, M. (Eds), Sept. 1997
6. P. Lysaght and J. Stockwood, "A Simulation Tool for Dynamically Reconfigurable Field Programmable Gate Arrays", in IEEE Transactions on VLSI Systems, Vol.4, No. 3, pp. 381-390, September, Sept. 1996
7. G. Brebner, "A virtual hardware operating system for the Xilinx XC6200", In Field-Programmable Logic and Applications, pp 327-336, Hartenstein, R. W. and Glesner, M., (Eds), Darmstadt, Sept. 1996
8. O. Diessel and H. ElGindy, "Run-time compaction of FPGA designs", In Field-Programmable Logic and Applications, pp 131-140, Luk, W., Cheung, P., & Glesner, M. (Eds) Sept 1997