메뉴 건너뛰기




Volumn , Issue , 2002, Pages 92-97

Buffer insertion with adaptive blockage avoidance

Author keywords

Algorithms; Performance

Indexed keywords

ALGORITHMS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; TOPOLOGY;

EID: 0036377419     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/505388.505412     Document Type: Conference Paper
Times cited : (13)

References (21)
  • 7
    • 0033699071 scopus 로고    scopus 로고
    • Routing tree construction render fixed buffer locations
    • (2000) DAC , pp. 379-384
    • Cong, J.1    Yuan, X.2
  • 12
    • 0033681635 scopus 로고    scopus 로고
    • Maze routing with buffer insertion and wiresizing
    • (2000) DAC , pp. 374-378
    • Lai, M.1    Wong, D.2
  • 18
    • 0032633422 scopus 로고    scopus 로고
    • MERLIN: Semi-order-independent hierarchical buffered routing tree generation using local neighborhood search
    • (1999) DAC , pp. 472-478
    • Salek, A.H.1    Lou, J.2    Pedram, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.