Dynamic stage matching for parallel pipeline A/D converters

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2002, Pages 905-908

  Bernardinis, Gabriele ^a   Malcovati, Piero ^a   Maloberti, Franco ^a,b   Soenen, Eric ^b  

^a UNIVERSITY OF PAVIA   (Italy)

^b TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER SIMULATION; HARMONIC DISTORTION; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE; TRANSFER FUNCTIONS;

DYNAMIC ELEMENT MATCHING; DYNAMIC STAGE MATCHING; GAIN ERROR MISMATCHES; PARALLEL PIPELINE; PSEUDO-RANDOM SEQUENCE GENERATOR; SIGNAL TO NOISE AND DISTORTION RATIO; SPURIOUS FREE DYNAMIC RANGE;

ANALOG TO DIGITAL CONVERSION;

EID: 0036295901     PISSN: 02714310     EISSN: None     Source Type: Journal    
DOI: 10.1109/ISCAS.2002.1009988     Document Type: Article

References (10)

1. Time interleaved converter arrays
2. An 8-b 85-MS/s parallel pipeline A/D converter in 1-μm CMOS
3. Digital spectra of nonuniformly sampled signals: Fundamentals and high-speed waveform digitizers
4. Explicit analysis of channel mismatch effects in time-interleaved ADC systems
5. A digital background calibration technique for time-interleaved A/D converters
6. An analog background calibration technique for time-interleaved A/D converters
7. A global passive sampling technique for high-speed SC time-interleaved ADCs
8. Feed-forward approach for timing skew in interleaved and double-sampled circuits
9. A digital background calibration technique for minimizing timing-error effects in time-interleaved ADCs
10. Digital cancellation of D/A converter noise in pipeline A/D converters