A global passive sampling technique for high-speed switched-capacitor time-interleaved ADCs

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 9, 2000, Pages 821-831

  Gustavsson, Mikael ^a   Tan, Nianxiong Nick ^b  

^a LINKÖPING UNIVERSITY   (Sweden)

^b GlobeSpan Technologies Inc   (United States)

Author keywords

Parallel converter; Switched capacitor circuits; Time interleaved analog to digital converter; Timing error

Indexed keywords

CAPACITORS; DELAY CIRCUITS; ELECTRIC NETWORK SYNTHESIS; ELECTRIC SWITCHES;

SAMPLE AND HOLD (S/H) CIRCUITS; SWITCHED-CAPACITOR TIME-INTERLEAVED ANALOG TO DIGITAL CONVERTERS;

ANALOG TO DIGITAL CONVERSION;

EID: 0034271575     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.868451     Document Type: Article

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