Reliability evaluation of 3D-package with specific test structures

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2002, Pages 1709-1713

  Tanskanen, Jarmo ^a   Alander, Tapani ^a   Ristolainen, Eero O ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

MOISTURE SENSORS; TEMPERATURE SENSORS;

ADHESIVES; CMOS INTEGRATED CIRCUITS; DIES; ELECTRIC CURRENTS; FLIP CHIP DEVICES; SENSORS; SOLDERING;

CHIP SCALE PACKAGES;

EID: 0036292865     PISSN: 05695503     EISSN: None     Source Type: Journal    
DOI: 10.1109/ECTC.2002.1008339     Document Type: Article

References (10)

1. Stacked thin dice packaging
2. Test chip development to support standardization efforts
3. A thermal benchmark chip: Design and applications
4. Effects of misalignment on reliability of flip chip solder joints
5. Complete stress state measurements in chip on board packages
6. A new stress chip design for electronic packaging applications
7. Design issues of a multi-functional intelligent thermal test die
8. CMOS stress sensors on (100) silicon
9. Errors associated with the design, calibration and application of piezoresistive stess sensors in (100) silicon
10. Silicon piezoresistive stress sensors and their application in electronic packaging