A new stress chip design for electronic packaging applications

International Symposium on Electronic Materials and Packaging, EMAP 2000

Volumn , Issue , 2000, Pages 457-463

  Hau, W L W ^a   Yuen, M M F ^a   Yan, G Z ^a   Chan, P C H ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; CALIBRATION; ELECTRONICS PACKAGING; HYDRAULICS; INTEGRATED CIRCUIT DESIGN; MODIFIED ATMOSPHERE PACKAGING; PACKAGING; SHEAR STRESS; TEMPERATURE MEASUREMENT; THERMAL EXPANSION; WAFER BONDING;

CALIBRATION PROCESS; ELECTRONIC PACKAGING; ELECTRONIC PACKAGING APPLICATIONS; PIEZORESISTIVE COEFFICIENTS; REAL TIME MEASUREMENTS; TEMPERATURE COMPENSATED; THEORETICAL MODELING; THERMALLY INDUCED STRESS;

CHIP SCALE PACKAGES;

EID: 0009557121     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EMAP.2000.904199     Document Type: Conference Paper

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