Effects of shallow trench isolation on silicon-on-insulator devices for mixed signal processing

Journal of the Korean Physical Society

Volumn 40, Issue 4, 2002, Pages 653-657

  Lee, Hyeokjae ^a   Park, Young June ^b   Min, Hong Shick ^b   Lee, Jong Ho ^c   Shin, Hyungsoon ^d   Sun, Wookyung ^e   Kang, Dae Gwan ^e  

^a CHARTERED SEMICONDUCTOR MANUFACTURING LTD   (Singapore)

^b Seoul National University   (South Korea)

^c Kyungpook National University   (South Korea)

^d Ewha Womans University   (South Korea)

^e Hynix Semiconductor Inc   (South Korea)

Author keywords

Gate shape; Low frequency noise; MOSFET; Narrow width; SOI; STI

Indexed keywords

EID: 0036011355     PISSN: 03744884     EISSN: None     Source Type: Journal    
DOI: 10.3938/jkps.40.653     Document Type: Conference Paper

References (10)

1. C.L. Huang, H.R. Soleimani, G.J. Grula, J.W. Sleight, A. Villani, H. Ali and D.A. Antoniadis, IEEE Trans. Electron Devices 44, 646 (1997).
2. W. Sleight, C. Lin and G.J. Grula, Member, IEEE Electron Devices Lett. 20, 248 (1999).
3. J.W. Lee, H.K. Kim, M.R. Oh and Y.H. Koh, IEEE Electron Devices Lett. 20, 478 (1999).
4. D. Ha, C. Cho, D. Shin, G.H. Koh, T.Y. Chung and K. Kim, IEEE Trans. Electron Devices 46, 940 (1999).
5. T. Kim, J. Kim and J. Om, J. Korean Phys. Soc. 35, S861 (1999).
6. C. Wang and P.F. Zhang, IEEE Trans. Electron Devices 46, 139 (1999).
7. T. Oishi, K. Shiozawa, A. Furukawa, Y. Abe and Y. Tokuda, IEEE Trans. Electron Devices 47, 822 (2000).
8. H. Lee, J.H. Lee, D.G. Kang, M.S. Min and Y.J. Park, IEEE Int'l SOI conference (Durango, Oct., 2000) p. 132.
9. C. Chen and T.P. Ma, IEEE Trans. Electron Devices 47, 512 (2000).
10. G. Goebel, D. Schumann and E. Bertagnolli, IEEE Trans. Electron Devices 48, 897 (2001).