Debug methodology for the McKinley processor

IEEE International Test Conference (TC)

Volumn , Issue , 2001, Pages 451-460

  Josephson, Don Douglas ^a   Poehlman, Steve ^a   Govan, Vincent ^a  

^a HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER DEBUGGING; COMPUTER SIMULATION; ELECTRIC CLOCKS; ELECTRIC POTENTIAL; INTEGRATED CIRCUIT TESTING; PHASE LOCKED LOOPS;

AUTOMATED TEST EQUIPMENT (ATE);

MICROPROCESSOR CHIPS;

EID: 0035687174     PISSN: 10893539     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEST.2001.966662     Document Type: Article

References (9)

1. Test methodology for the McKinley processor
2. Functional verification of the HP PA8000 processor
3. Electrical verification of the HP PA8000 processor
4. Shmoo plotting: The black art of IC testing
5. The attack of the 'holey shmoos': A case study of advanced DFD and picosecond imaging analysis (PICA)
6. Novel optical probing technique for flip chip packaged microprocessors
7. Pentium® pro processor design for test and debug
8. Clock generation and distribution for the first IA-64 microprocessor
9. Test features of the PA7100LC processor