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Volumn , Issue , 2001, Pages 578-585
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Test methodology for the McKinley processor
a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
DATA STORAGE EQUIPMENT;
FLIP FLOP CIRCUITS;
INTEGRATED CIRCUIT TESTING;
LOGIC DESIGN;
PHASE LOCKED LOOPS;
PROGRAM DEBUGGING;
TIMING CIRCUITS;
MCKINLEY PROCESSORS;
MEMORY ARRAYS;
MICROPROCESSOR CHIPS;
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EID: 0035684216
PISSN: 10893539
EISSN: None
Source Type: Journal
DOI: 10.1109/TEST.2001.966676 Document Type: Article |
Times cited : (18)
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References (21)
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