Determination of slow- and fast-state distributions using high-temperature conductance spectroscopy on MOS structures

Semiconductor Science and Technology

Volumn 16, Issue 10, 2001, Pages

  Duval, Emmanuel ^a   Lheurette, Eric ^a   Ketata, K ^a   Ketata, M ^a  

^a UNIVERSITÉ DE ROUEN   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CONDUCTANCE; ELECTRIC POTENTIAL; GATES (TRANSISTOR); HIGH TEMPERATURE APPLICATIONS; SENSITIVITY ANALYSIS; SPECTROSCOPIC ANALYSIS;

HIGH TEMPERATURE CONDUCTANCE SPECTROSCOPY;

MOS DEVICES;

EID: 0035481050     PISSN: 02681242     EISSN: None     Source Type: Journal    
DOI: 10.1088/0268-1242/16/10/101     Document Type: Article

References (28)

1. MOS conductance technique for measuring surface state parameters
2. Expedient method of obtaining interface state properties from MIS conductance measurements
3. 2 Interface
4. 2 interface
5. 2 interfaces
6. Modeled tunnel currents for high dielectric constant dielectrics
7. Design optimization of stacked layer dielectrics for minimum gate leakage currents
8. 2 dielectrics
9. Effective density of states approach to QM correction in MOS structures
10. Experiments and modelling to determine trapped holes and slow states in Fowler-Nordheim stressed MOS capacitors
11. 2 interface
12. Charge pumping spectroscopy with pulsed interface probing
13. A reliable approach to charge-pumping measurements in MOS transistors
14. 'Borders traps' in MOS devices
15. Effects of oxide traps, interface traps and 'border traps' on metal-oxide-semiconductor devices
16. Interface state density measurement in MOS structures by analysis of the thermally stimulated conductance
17. 2 interface
18. Observation of 'slow' states in conductance measurements on silicon metal-oxide-semiconductor capacitors
19. 2 interface using the conductance technique
20. Improvement of oxide thickness determination on MOS structures using capacitance-voltage measurements at high frequencies
21. 2 interfaces
22. Complete exploration of the silicon gap at the interface of MIS tunnel diodes using conductance technique at various temperatures and illuminations levels
23. a) using the conductance technique
24. Detection of interface and volume traps in very thin oxide MOS structures using DLTS, quasi-static and conductance measurements
25. Determination of energy density distribution and capture cross section of interface states in the metal-nitride-oxide-semiconductor (MNOS) structure
26. Temperature and energy dependencies of capture cross section at surface states in Si metal-oxide-semiconductor diodes measured by deep level transient spectroscopy
27. Rapid determination of 'slow' and 'fast' states densities using thermally stimulated conductance spectroscopy on metal-oxide-semiconductor capacitors