Offset in CMOS magnetotransistors - Part II: Reduction

IEEE Transactions on Electron Devices

Volumn 48, Issue 9, 2001, Pages 1954-1960

  Metz, Matthias ^b   Baltes, Henry ^a,b  

^a IEEE

^b ETH ZURICH   (Switzerland)

Author keywords

Compensation; Magnetic transducers; Magneto transistor; Offset reduction; Semiconductor device matching; Semiconductor fabrication imperfections

Indexed keywords

ELECTRONICS PACKAGING; MASKS; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON WAFERS; TEMPERATURE CONTROL;

MAGNETIC TRANSDUCERS; MAGNETOTRANSISTORS; SEMICONDUCTOR DEVICE MATCHING; SEMICONDUCTOR FABRICATION IMPERFECTIONS;

CMOS INTEGRATED CIRCUITS;

EID: 0035444558     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.944182     Document Type: Article

References (19)

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