A static differential double edge-triggered flip-flop based on clock racing

Microelectronics Journal

Volumn 32, Issue 8, 2001, Pages 665-671

  Moisiadis, Yiannis ^a,c   Bouras, Ilias ^b   Arapoyanni, Angela ^a   Dermentzoglou, Lampros ^a  

^a UNIVERSITY OF ATHENS   (Greece)

^b HELIC   (Greece)

^c INSTITUTE OF MICROELECTRONICS   (Greece)

Author keywords

Clock racing; Double edge triggered; Flip flop; Low power

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; TRANSISTORS;

DOUBLE EDGE-TRIGGERED (DET) FLIP FLOPS;

FLIP FLOP CIRCUITS;

EID: 0035426949     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2692(01)00040-4     Document Type: Article

References (15)

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14. Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems