Investigation of plasma damage effects on characteristics and reliability of MOS devices with thin gate dielectrics

Solid-State Electronics

Volumn 45, Issue 8, 2001, Pages 1299-1307

  Brozek, Tomasz ^a   Huber, John ^a   Walls, James ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; GATES (TRANSISTOR); OXIDATION RESISTANCE; PLASMA DEVICES; THIN FILMS;

PLASMA DAMAGE EFFECTS; THIN GATE DIELECTRICS;

MOS DEVICES;

EID: 0035418161     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(00)00272-0     Document Type: Article

References (11)

1. Plasma-charging damage: A physical model
2. Effect of device type and plasma process on the oxide thickness dependence of plasma-induced charging damage
3. Effect of MOS device scaling on process induced gate charging
4. Evaluation of plasma damage using fully processed metal-oxide-semiconductor transistors
5. Using SEMATECH electrical test structures in assessing plasma induced damage in poly etching
6. Threshold voltage degradation in plasma-damaged CMOS transistors - Role of electron and hole traps related to charging damage
7. 2
8. In-line testing of antenna-type test structures for separation of sources of process-induced damage
9. Gate oxide leakage due to temperature accelerated degradation under plasma charging conditions
10. Role of temperature in process-induced charging damage in sub-micron CMOS transistors
11. Annealing of plasma charging damage and residual degradation in MOS transistors