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Volumn 38, Issue 1, 1998, Pages 73-79

Gate oxide leakage due to temperature accelerated degradation under plasma charging conditions

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN OF SOLIDS; LEAKAGE CURRENTS; PLASMA APPLICATIONS; SEMICONDUCTOR DEVICE MANUFACTURE; THERMAL EFFECTS;

EID: 0031645521     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(97)00076-0     Document Type: Article
Times cited : (4)

References (19)
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    • Shin, H.1    King, C.-C.2    Horiuchi, T.3    Hu, C.4
  • 4
    • 0028517394 scopus 로고
    • Modeling of oxide breakdown from gate charging during resist ashing
    • Fang, S., Murakawa, S. and McVittie, J. P. Modeling of oxide breakdown from gate charging during resist ashing. IEEE Trans. Electron Dev., 1994, 41, 1848.
    • (1994) IEEE Trans. Electron Dev. , vol.41 , pp. 1848
    • Fang, S.1    Murakawa, S.2    McVittie, J.P.3
  • 5
    • 0028257884 scopus 로고
    • The effect of plasma-induced oxide and interface degradation on hot carrier reliability
    • Noguchi, K. and Okumura, K., The effect of plasma-induced oxide and interface degradation on hot carrier reliability. In Proc. IEEE Int. Rel. Phys. Symp., 1994, p. 232.
    • (1994) Proc. IEEE Int. Rel. Phys. Symp. , pp. 232
    • Noguchi, K.1    Okumura, K.2
  • 10
    • 0029512597 scopus 로고
    • Effects of wafer temperature on plasma charging induced damage to MOS gate oxide
    • Ma, S., McVittie, J. P. and Saraswat, K. C. Effects of wafer temperature on plasma charging induced damage to MOS gate oxide. IEEE Electron Dev. Lett., 1995, 16, 534.
    • (1995) IEEE Electron Dev. Lett. , vol.16 , pp. 534
    • Ma, S.1    McVittie, J.P.2    Saraswat, K.C.3
  • 11
  • 12
    • 0024907452 scopus 로고
    • Gate oxide charging and its elimination for metal antenna capacitor and transistor in VLSI CMOS double layer metal technology
    • Shone, F. et al., Gate oxide charging and its elimination for metal antenna capacitor and transistor in VLSI CMOS double layer metal technology. In Symp. on VLSI Technology, Dig. Tech. Papers, 1989, p. 73.
    • (1989) Symp. on VLSI Technology, Dig. Tech. Papers , pp. 73
    • Shone, F.1
  • 13
    • 0028460611 scopus 로고
    • Using SEMATECH electrical test structures in assessing plasma induced damage in poly etching
    • Chan, Y. D. Using SEMATECH electrical test structures in assessing plasma induced damage in poly etching. Jpn. J. Appl. Phys., 1994, 33(7B), 4458.
    • (1994) Jpn. J. Appl. Phys. , vol.33 , Issue.7 B , pp. 4458
    • Chan, Y.D.1
  • 15
    • 0005325257 scopus 로고    scopus 로고
    • Process kit and wafer temperature effects on dielectric etch rate and uniformity of electrostatic chuck
    • Shan, H. et al. Process kit and wafer temperature effects on dielectric etch rate and uniformity of electrostatic chuck. J. Vac. Sci. Technol. B, 1996, 14(1), 521.
    • (1996) J. Vac. Sci. Technol. B , vol.14 , Issue.1 , pp. 521
    • Shan, H.1
  • 16
    • 0027693956 scopus 로고
    • Modeling oxide thickness dependence of charging damage by plasma processing
    • Shin, H., Noguchi, K. and Hu, C. Modeling oxide thickness dependence of charging damage by plasma processing. IEEE Electron Dev. Lett., 1993, 14, 509.
    • (1993) IEEE Electron Dev. Lett. , vol.14 , pp. 509
    • Shin, H.1    Noguchi, K.2    Hu, C.3
  • 18
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    • Dielectric breakdown in MOS devices II. Conditions for the intrinsic breakdown
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    • Wolters, D.R.1    Van Der Schoot, J.J.2
  • 19
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    • Effect of low and high temperature anneal on process-induced damage of gate oxide
    • King, J. C. and Hu, C. Effect of low and high temperature anneal on process-induced damage of gate oxide. IEEE Electron Dev. Lett., 1994, 15, 475.
    • (1994) IEEE Electron Dev. Lett. , vol.15 , pp. 475
    • King, J.C.1    Hu, C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.