The Microarchitecture of Superscalar Processors

Proceedings of the IEEE

Volumn 83, Issue 12, 1995, Pages 1609-1624

  Smith, James E ^a   Sohi, Gurindar S ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING; CONSTRAINT THEORY; DATA REDUCTION; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; PROBLEM SOLVING; REDUCED INSTRUCTION SET COMPUTING; SCHEDULING;

DYNAMIC INSTRUCTION SCHEDULING; INSTRUCTION LEVEL PARALLELISM; MICROARCHITECTURE; SUPERSCALAR PROCESSING; TOMASULO ALGORITHM;

MICROCOMPUTERS;

EID: 0029531029     PISSN: 00189219     EISSN: 15582256     Source Type: Journal    
DOI: 10.1109/5.476078     Document Type: Article

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