On-chip inductance modeling

Proceedings of the IEEE Great Lakes Symposium on VLSI

Volumn , Issue , 2000, Pages 75-80

  Blaauw, David ^a   Gala, Kaushik ^a   Zolotov, Vladimir ^a   Panda, Rajendran ^a   Wang, Junfeng ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; INTERCONNECTION NETWORKS; MICROPROCESSOR CHIPS; SEMICONDUCTOR DEVICE MODELS;

ON-CHIP INTERCONNECT;

INTEGRATED CIRCUIT LAYOUT;

EID: 0033707592     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/330855.330980     Document Type: Conference Paper

References (13)