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Volumn , Issue , 1999, Pages 915-920
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IC analyses including extracted inductance models
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Author keywords
[No Author keywords available]
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Indexed keywords
CAPACITANCE;
CMOS INTEGRATED CIRCUITS;
ELECTRIC RESISTANCE;
INTEGRATED CIRCUIT LAYOUT;
INTERCONNECTION NETWORKS;
EXTRACTED INDUCTANCE MODELS;
INTEGRATED CIRCUIT TESTING;
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EID: 0032629526
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/309847.310098 Document Type: Conference Paper |
Times cited : (30)
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References (15)
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