Single event effects in circuit-hardened SiGe HBT logic at gigabit per second data rates

IEEE Transactions on Nuclear Science

Volumn 47, Issue 6 III, 2000, Pages 2669-2674

  Marshall, Paul W ^a,b   Carts, Martin A ^a,c   Campbell, Arthur ^a,d   McMorrow, Dale ^d   Buchner, Steve ^a,b   Stewart, Ryan ^e   Randall, Barbara ^f   Gilbert, Barry ^a,f   Reed, Robert A ^a,g  

^a IEEE   (United States)

^b SFA Inc   (United States)

^c RAYTHEON COMPANY   (United States)

^d NAVAL RESEARCH LABORATORY   (United States)

^e UNIVERSITY OF TEXAS SOUTHWESTERN MEDICAL CENTER   (United States)

^f MAYO CLINIC   (United States)

^g NASA GODDARD SPACE FLIGHT CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA RATES; SINGLE EVENT EFFECTS;

CMOS INTEGRATED CIRCUITS; HARDENING; HEAVY IONS; PULSED LASER APPLICATIONS; SEMICONDUCTING SILICON COMPOUNDS; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 0034451894     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/23.903824     Document Type: Conference Paper

References (22)

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3. Anomalous dose rate effects in gamma irradiated SiGe heterojunction bipolar transistors
4. Total dose hardness of a commercial SiGe BiCCMOS technology
5. Neutron radiation tolerance of advanced UHV/CVD SiGe HBT BiCMOS technology
6. An investigation of the spatial location of proton-induced traps in SiGe HBTs
7. Electrical probing of surface and bulk traps in proton-irradiated gate-assisted lateral p-n-p transistors
8. The effects of proton irradiation on the RF performance of SiGe HBTs
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10. Single-event phenomena in GaAs devices and circuits
11. Dependence of the SEU window of vulnerability of a logic circuit on magnitude of deposited charge
12. Particle-induced mitigation of SEU sensitivity in high data rate GaAs HIGFET technologies
13. Charge collection characteristics of GaAs heterostructure FET's fabricated with a low-temperature grown GaAs buffer layer
14. Single event upset cross sections at various data rates
15. Single event test methodology and test results of commercial gigabit per second fiber channel hardware
16. Heavy ion immunity of a GaAs complementary HIGFET circuit fabriacted on a low temperature grown buffer layer
17. Effects of low-temperature buffer layer thickness and growth temperature on the SEE sensitivity of GaAs HIGFET circuits
18. Comparison of error rates in combinatorial and sequential logic
19. Critical evaluation of the pulsed laser method for single-event effects testing and fundamental studies
20. Pulsed laser induced single event upset and charge collection measurements as a function of optical penetration depth
21. Application of a pulsed laser for evaluation and optimization of SEU-hard designs