Effects of low-temperature buffer-layer thickness and growth temperature on the SEE ensitivity of GaAs HIGFET circuits

IEEE Transactions on Nuclear Science

Volumn 44, Issue 6 PART 1, 1997, Pages 2298-2305

  Weatherford, T R ^a,b,e   Marshall, P W ^a,c,d,e   Marshall, C J ^a,b,e   Fouts, D J ^a,b,e   Mathes, B ^a,b,c,d,e   Lamacchia, M ^a,b  

^a IEEE   (United States)

^b NAVAL POSTGRADUATE SCHOOL   (United States)

^c NAVAL RESEARCH LABORATORY   (United States)

^d SFA INC   (United States)

^e MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

RADIATION EFFECTS; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTOR DEVICE TESTING; SEMICONDUCTOR GROWTH; THERMAL EFFECTS;

BUFFER LAYERS; HETEROSTRUCTURE INSULATED GATE FIELD EFFECT TRANSISTOR (HIGFET); SINGLE EVENT EFFECTS (SEE);

JUNCTION GATE FIELD EFFECT TRANSISTORS;

EID: 0031360062     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/23.659049     Document Type: Article

References (13)

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