Design of low-cost and high-throughput linear arrays for DFT computations: algorithms, architectures, and implementations

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 11, 2000, Pages 1188-1203

  Hsiao, Shen Fu ^a   Shiue, Wei Ren ^b  

^a NATIONAL SUN YAT SEN UNIVERSITY   (Taiwan)

^b VIA Technologies Inc   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; CONFORMAL MAPPING; DIGITAL COMMUNICATION SYSTEMS; DISCRETE FOURIER TRANSFORMS; MATRIX ALGEBRA; MULTIPLYING CIRCUITS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; RECURSIVE FUNCTIONS; VLSI CIRCUITS; WIRELESS TELECOMMUNICATION SYSTEMS;

ASYMMETRIC DIGITAL SUBSCRIBER LINES; MATRIX BANDWIDTH; RECURSIVE ALGORITHMS;

DIGITAL SIGNAL PROCESSING;

EID: 0034318560     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.885127     Document Type: Article

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