메뉴 건너뛰기




Volumn 36, Issue 1, 1989, Pages 95-100

Efficient One-Dimensional Systolic Array Realization of the Discrete Fourier Transform

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; INTEGRATED CIRCUITS, VLSI; MATHEMATICAL TRANSFORMATIONS--FOURIER TRANSFORMS;

EID: 0024479933     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/31.16566     Document Type: Article
Times cited : (38)

References (17)
  • 1
    • 0019923189 scopus 로고
    • Why systolic architectures?
    • Jan.
    • H. T. Kung, “Why systolic architectures?” Computer Mag., vol. 15, no. 1, pp. 37–45, Jan. 1982.
    • (1982) Computer Mag , vol.15 , Issue.1 , pp. 37-45
    • Kung, H.T.1
  • 2
    • 0019096112 scopus 로고
    • Special purpose devices for signal and image processing: An opportunity in very large scale integration (VLSI)
    • H. T. Kung, “Special purpose devices for signal and image processing: An opportunity in very large scale integration (VLSI),” in Proc. SPIE, (Real Time Signal Processing III), vol. 241, pp. 76–84, 1980.
    • (1980) Proc. SPIE (Real Time Signal Processing III) , vol.241 , pp. 76-84
    • Kung, H.T.1
  • 3
    • 0021510865 scopus 로고
    • Systolic matrix and vector multiplication methods for signal processing
    • Oct.
    • R. B. Urquhart and D. Wood, “Systolic matrix and vector multiplication methods for signal processing,” Proc. Inst. Elec. Eng., vol. 131, pt. F, no. 6, pp. 623–631, Oct. 1984.
    • (1984) Proc. Inst. Elec. Eng , vol.131 , Issue.6 , pp. 623-631
    • Urquhart, R.B.1    Wood, D.2
  • 5
    • 84941861198 scopus 로고
    • Fourier transforms in VLSI
    • Nov.
    • C. D. Thompson, “Fourier transforms in VLSI,” IEEE Trans. Computers, vol. C-32, pp. 1047–1057, Nov. 1983.
    • (1983) IEEE Trans. Computers , vol.C-32 , pp. 1047-1057
    • Thompson, C.D.1
  • 6
    • 0021139487 scopus 로고
    • An algorithm basis for systolic/wavefront array software
    • May
    • S. Y. Kung, “An algorithm basis for systolic/wavefront array software,” in Proc. IEEE Int. Conf. ASSP, pp. 25A.2.1-2.4, May 1984.
    • (1984) Proc. IEEE Int. Conf. ASSP , pp. 25A 2.1-25A 2.4
    • Kung, S.Y.1
  • 7
    • 0020799158 scopus 로고
    • Hardware-based Fourier transforms: Algorithms and architectures
    • Aug.
    • T. E. Curtis and J. T. Wickenden, “Hardware-based Fourier transforms: Algorithms and architectures,” Proc. Inst. Elec. Eng., vol. 130, pt. F, no. 5, pp. 423–432, Aug. 1983.
    • (1983) Proc. Inst. Elec. Eng , vol.130 , Issue.5 , pp. 423-432
    • Curtis, T.E.1    Wickenden, J.T.2
  • 9
    • 0021442079 scopus 로고
    • Architectural approach to alternate low-level primitive structures (ALPS) for acoustic signal processing
    • June
    • Y. S. Wu, A. G. Constantinides, T. E. Curtis, and L. J. Wu, “Architectural approach to alternate low-level primitive structures (ALPS) for acoustic signal processing,” Proc. Inst. Elec. Eng., vol. 131, pt. F, no. 3, pp. 327–333, June 1984.
    • (1984) Proc. Inst. Elec. Eng , vol.131 , Issue.3 , pp. 327-333
    • Wu, Y.S.1    Constantinides, A.G.2    Curtis, T.E.3    Wu, L.J.4
  • 10
    • 0021389635 scopus 로고
    • Number representations for prime length DFTs
    • Mar.
    • J. S. Ward, “Number representations for prime length DFTs,” Electron. Lett., vol. 20, no. 7, pp. 301–302, Mar. 1984.
    • (1984) Electron. Lett , vol.20 , Issue.7 , pp. 301-302
    • Ward, J.S.1
  • 11
    • 0023365455 scopus 로고
    • DSP chip runs Fourier transforms of nonstop input
    • June
    • C. Tiefenthaler, “DSP chip runs Fourier transforms of nonstop input,” Electron. Products, vol. 30, no. 1, pp. 26–32, June 1987.
    • (1987) Electron. Products , vol.30 , Issue.1 , pp. 26-32
    • Tiefenthaler, C.1
  • 12
    • 84939322519 scopus 로고
    • Efficient one-dimensional systolic array realization of the discrete Fourier transform
    • (The Hague The Netherlands) Sept. 2-5
    • J. A. Beraldin, T. Aboulnasr, and W. Steenaart, “Efficient one-dimensional systolic array realization of the discrete Fourier transform,” in EUSIPCO Conf. Proc. (The Hague, The Netherlands), pp. 251–254, Sept. 2–5, 1986.
    • (1986) EUSIPCO Conf. Proc , pp. 251-254
    • Beraldin, J.A.1    Aboulnasr, T.2    Steenaart, W.3
  • 13
    • 0022146161 scopus 로고
    • Systolic implementations for deconvolution, DFT and FFT
    • Oct.
    • T. Willey, R. Chapman, H. Yoho, and D. Preis, “Systolic implementations for deconvolution, DFT and FFT,” Proc. Inst. Elec. Eng., vol. 132, pt. F, no. 6, pp. 466–472, Oct. 1985.
    • (1985) Proc. Inst. Elec. Eng , vol.132 , Issue.6 , pp. 466-472
    • Willey, T.1    Chapman, R.2    Yoho, H.3    Preis, D.4
  • 17
    • 84936488570 scopus 로고
    • VLSI systolic array architecture for the computation of the discrete Fourier transform
    • J. A. Beraldin, “VLSI systolic array architecture for the computation of the discrete Fourier transform,” M.A.Sc. thesis, Univ. of Ottawa, Canada, 1986.
    • (1986) M.A. Sc. thesis, Univ. of Ottawa, Canada
    • Beraldin, J.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.